LSO2 Search Results

block diagram bluetooth headset

Contextual Info: Features • • • • • • • • • • • • • • • • • • 300 mA/1.9V/2.5V DC to DC for Co-processor Core 80 mA/2.8V Dual-mode LDO for Memories LDO1 130 mA/2.7V/2.8V LDO for Camera Module (LDO2) 130 mA/2.8V LDO for Analog Section Supply of Audio Stereo Codec (LDO6)

SMCS332

Abstract: ERC32 MG1140E TSC21020F TSC695E TSS901E
Contextual Info: Features • 3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1.25 up to 200 Mbit/s in each direction • A COmmunication Memory Interface COMI provides autonomous accesses to a • • • •

SMCS332

Abstract: 5962-01A1701QXC ERC32 C104 MG1140E TSC21020F TSC695E TSS901E W359
Contextual Info: Features • 3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1.25 up to 200 Mbit/s in each direction • A COmmunication Memory Interface COMI provides autonomous accesses to a • • • •

ERC32

Abstract: MG1140E SMCS332 TSC21020F TSC695E TSS901E memory arbitration scheme
Contextual Info: Features • 3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1.25 up to 200 Mbit/s in each direction • A COmmunication Memory Interface COMI provides autonomous accesses to a • • • •

qfn64 footprint

Abstract: TQFP80 footprint dimensions QFN-64 package
Contextual Info: SiM3U1xx High-Performance, Low-Power, 32-Bit Precision32 USB MCU Family with up to 256 kB of Flash 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 priority levels

AT73C204

Abstract: 1248 camera 49-BALL ATMEL 436
Contextual Info: P OWER M ANAGEMENT AT73C204 POWER MANAGEMENT UNIT P RODUCTS FOR M ULTIMEDIA M ODULES Integrates in a single IC the power management circuitry required for multimedia handsets and PDAs. Image: Haz'art Studio l l l 7 independent linear voltage regulators optimized for supplies

QFN-64 thermal resistance

Abstract: SIM3U167-B-GM TQFP 80 PACKAGE Cortex-M3 Reference Manual tqfp 64 pcb land pattern SIM3U167 CS05 PB3-11 LGA 32 land pattern silicon labs SIM3U134-B-GM
Contextual Info: SiM3U1xx High-Performance, Low-Power, 32-Bit Precision32 USB MCU Family with up to 256 kB of Flash 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 levels of

Contextual Info: SiM3U167-B-GDI High-Performance, Low-Power, 32-Bit Precision32 USB MCU Family with up to 256 kB of Flash Die in Wafer Form Power Management - Low drop-out LDO regulator - Power-on reset circuit and brownout detectors - 5–3.3 V 150 mA regulator supports direct USB power

resistor 5600ohm

Contextual Info: SPECIFICATION MHS / SCC 043 Rev 2C September 1999 PROJECT SPACE GENERAL TITLE SCALABLE MULTI-CHANNEL COMMUNICATION SUBSYSTEM SMCS . Page 1 of 39 SPECIFICATION MHS / SCC 043 Rev 2C September 1999 Page 2 of 39 DOCUMENTATION CHANGE NOTICE Date of Update 15/12/1998

TSC21020F

Abstract: TSC695E TSS901E ERC32 MG1140E SMCS332
Contextual Info: Features • 3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1.25 up to 200 Mbit/s in each direction • A COmmunication Memory Interface COMI provides autonomous accesses to a • • • •

RCR07

Abstract: AD420-EB AD420 transistor 2n3053 BASIC digital multimeter diagram AD420AR transistor directory TP10 AD420AN
Contextual Info: ANALOG DEVICES Evaluation Board AD420 16-Bit 4-20mA DAC GENERAL DESCRIPTION The AD420-EB is an evaluation board for the AD420 16 bit serial input 4 - 20mA, 0 - 20mA DAC. The evaluation board is configured with two AD420s. Both devices are indepen­ dently controlled with an IBM PC or compatible, via its

AN-20

Abstract: VSC7121 VSC7121QM
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Data Sheet Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays VSC7121 Description • Supports ANSI X3T11 1.0625 Gbit/sec FC-AL Disk Attach for Resiliency • TTL Bypass Select • Fully Differential for Minimum

Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 16 17 REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY 1 2 3 4 5 Phu H. Nguyen STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE

Contextual Info: Features • 3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1.25 up to 200 Mbit/s in each direction • A COmmunication Memory Interface COMI provides autonomous accesses to a • • • •

lso5

Abstract: ADC04
Contextual Info: SiM3U167-B-GDI High-Performance, Low-Power, 32-Bit Precision32 USB MCU Family with up to 256 kB of Flash Die in Wafer Form 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 priority levels

c1251c

Abstract: Driver 314 ctv 314 driver
Contextual Info: s e M IKRO n SKiiP 342 GD 120 - 314 CTV Absolute Maximum Ratings Symbol |Conditions11 Values Units 1200 900 300 - 4 0 . . . + 150 3000 5 300 600 2160 23,4 V IGBT & Inverse Diode V ces V cc 9) lc T j3’ Visol 4) If I fm I fsm f t Diode) Operating D C link voltage

ERC32

Abstract: MG1140E SMCS332 TSC21020F TSC695E TSS901E
Contextual Info: Features • 3 identical bidirectional link channels allowing full duplex communication under selectable transmit rate from 1.25 up to 200 Mbit/s in each direction • A COmmunication Memory Interface COMI provides autonomous accesses to a • • • •

TQFP80 footprint dimensions

Abstract: Cortex-M3 Reference Manual pb211 tqfp 64 pcb land pattern CRC128
Contextual Info: SiM3C1xx High-Performance, Low-Power, 32-Bit Precision32 MCU Family with up to 256 kB of Flash 32-bit ARM Cortex™-M3 CPU - 80 MHz maximum frequency - Single-cycle multiplication, hardware division support - Nested vectored interrupt control NVIC with 16 levels of

So4 741

Abstract: lso2 AN-20 VSC7121 VSC7122 VSC7122QM K2311
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Advance Product Information Quad Port Bypass Circuit for 1.0625 Gbit/sec Fibre Channel Arbitrated Loop Disk Arrays VSC7122 Features • Supports ANSI X3T11 1.0625 Gbit/sec FC-AL Disk Attach for Resiliency • TTL Bypass Select

Contextual Info: PD-97812 LSO SERIES HYBRID-HIGH RELIABILITY RADIATION HARDENED DC-DC CONVERTER 28V Input, Single/Dual Output Description The LSO Series of DC-DC converters are, high reliability devices designed for hostile radiation hardened environments. The design is based on the heritage-rich

smd marking dt9

Abstract: qml-38535 diode smd marking BUF
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 16 17 REV STATUS 18 REV OF SHEETS SHEET PMIC N/A PREPARED BY 1 2 3 4 5 6 7 8 9 10 11 12 13 Phu H. Nguyen STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216

IR SCR

Abstract: p5md chn 744 scr p5g 7f22 500bp chn 745 IC 3A 4011 MN102L35G CHN 747
Contextual Info: M IC R O C O M P U T E R M N 102L00 MN102L35G LSI 説明書 Pub.No.22235-034 PanaXSeriesは松下電器産業株式会社の商標です。 その他記載された会社名及びロゴ、製品名などは該当する各社の商標または登録商標です。

SMCS332SpW

Abstract: mc56000 SMCS332 SMCS116SpW ERC32 ADSP21020 P100 RS-01 TMS320C40 10-Jul-2007
Contextual Info: Astrium GmbH, ASE2 Doc No: SMCS_ASTD_UM_100 Issue: 1.5 Updated: 10-Jul-2007 Page: 2 of 132 SMCS332SpW User Manual Document Revision History Revision Date Responsible Modifications / Reasons for Change 1.0 June-05 Uwe Liebstückel First release 1.1 Nov-05 Uwe Liebstückel

SMCS332

Abstract: ERC32 MQ 6 SENSOR pin diagram C104 TSC21020F TSC695E TSS901E
Contextual Info: TSS901E Intelligent and Flexible IEEE 1355 communication controller for space Description and Applications The TSS901E provides an interface between a DataStrobe link - according to the IEEE Std 1355-1995 specification carrying a simple interprocessor communication protocol - and a data processing node