LS355 Search Results

PNP Monolithic Transistor Pair

Contextual Info: LS3550C MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550C is a monolithic pair of PNP transistors mounted in a single P-DIP package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550A MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550A is a monolithic pair of PNP transistors mounted in a single P-DIP package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550B MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550B is a monolithic pair of PNP transistors mounted in a single SOT-23 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550C MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550C is a monolithic pair of PNP transistors mounted in a single TO-71 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550C MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550C is a monolithic pair of PNP transistors mounted in a single SOIC package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

BE21

Abstract: LOUA
Contextual Info: LINEAR SYSTEMS LS3$50A, LS3550B, LS3560C SOT- 6 LEAD SURFACE MOUNT MONOLITHIC DUAL PNP TRANSISTORS Linear In teg rated Systems T op V iew FEATURES 6 le a d S u rfa c e M ount P a c k a g e H Tight M atch in g - .5 mV Typ. / 2 mV Max. LS3550A c M onolithic Dual - Ex cellent Thermal tracking

A3UV

Contextual Info: LS3550A MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550A is a monolithic pair of PNP transistors mounted in a single TO-71 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550B MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550B is a monolithic pair of PNP transistors mounted in a single P-DIP package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550SB PNP TRANSISTOR Linear Systems PNP Transistor The LS3550SB is a PNP transistor mounted in a SOT23 package. The SOT-23 provides ease of manufacturing. See Packaging Information . LS3550SB Features: ƒ Low Output Capacitance ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

Contextual Info: LS3550C MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550C is a monolithic pair of PNP transistors mounted in a single SOT-23 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550B MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550B is a monolithic pair of PNP transistors mounted in a single TO-71 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

BARE die

Contextual Info: LS3550SA PNP TRANSISTOR Linear Systems PNP Transistor The LS3550SA is a PNP transistor mounted in a SOT23 package. The SOT-23 provides ease of manufacturing. See Packaging Information . LS3550SA Features: ƒ Low Output Capacitance ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

Contextual Info: LS3550B MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550B is a monolithic pair of PNP transistors mounted in a single TO-78 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

LS3250A

Abstract: LS3250B LS3250C LS3550 LS3550A
Contextual Info: LS3550 SERIES MONOLITHIC DUAL PNP TRANSISTORS Linear Integrated Systems FEATURES 6 LEAD SOT-23 SURFACE MOUNT PACKAGE* TIGHT MATCHING1 EXCELLENT THERMAL TRACKING 2mV 1 SOT-23 TOP VIEW 3µV/°C ABSOLUTE MAXIMUM RATINGS2 B1 E2 B2 @ 25 °C unless otherwise stated

Contextual Info: LS3550SA PNP TRANSISTOR Linear Systems PNP Transistor The LS3550SA is a PNP transistor mounted in a TO-92 package. The TO-92 provides ease of manufacturing. See Packaging Information . LS3550SA Features: ƒ Low Output Capacitance ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

Contextual Info: LS3550SC PNP TRANSISTOR Linear Systems PNP Transistor The LS3550SC is a PNP transistor mounted in a TO-92 package. The TO-92 provides ease of manufacturing. See Packaging Information . LS3550SC Features: ƒ Low Output Capacitance ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

Contextual Info: LS3550SB PNP TRANSISTOR Linear Systems PNP Transistor The LS3550SB is a PNP transistor mounted in a TO-92 package. The TO-92 provides ease of manufacturing. See Packaging Information . LS3550SB Features: ƒ Low Output Capacitance ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)

amelco

Abstract: LS3550A
Contextual Info: LS3550 SERIES MONOLITHIC DUAL PNP TRANSISTORS FEATURES 6 LEAD SOT-23 SURFACE MOUNT PACKAGE* 1 TIGHT MATCHING EXCELLENT THERMAL TRACKING ABSOLUTE MAXIMUM RATINGS * SOT-23 TOP VIEW 2mV 1 3µV/°C 2 B1 E2 B2 @ 25 °C unless otherwise stated Maximum Temperatures

Contextual Info: LS3550A MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550A is a monolithic pair of PNP transistors mounted in a single SOIC package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Contextual Info: LS3550C MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550C is a monolithic pair of PNP transistors mounted in a single TO-78 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

PNP Monolithic Transistor Pair

Contextual Info: LS3550A MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550A is a monolithic pair of PNP transistors mounted in a single TO-78 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

loua

Abstract: log conformance dual npn LS3550A LS3250A LS3250B LS3250C LS3550B LS3550C S0T23 SC74
Contextual Info: LINEAR SYSTEMS LS3550A, LS3550B, LS3550C SOT- 6 LEAD SURFACE MOUNT MONOLITHIC DUAL PNP TRANSISTORS Linear Integrateci Systems T op FEATURES 6 lea d S u rfa c e M ount P a c k a g e M onolithic Dual - Excellent Thermal tracking S p e c ia l Screenin g is A v a ila b le

Contextual Info: LS3550A MONOLITHIC DUAL PNP TRANSISTOR Linear Systems Monolithic Dual PNP Transistor The LS3550A is a monolithic pair of PNP transistors mounted in a single SOT-23 package. The monolithic dual chip design reduces parasitics and gives better performance while ensuring extremely tight matching.

Dual pnp Dual npn Transistor

Abstract: n-channel JFET sot23-6 surface mount pico-amp diode dual P-Channel JFET sot23 A1 sot23 n-channel dual Channel JFET sot23 "Dual npn Transistor" LS841 SOIC J110 spice A6 SOT-23 MOSFET P-CHANNEL
Contextual Info: LS3550 SERIES MONOLITHIC DUAL PNP TRANSISTORS Linear Integrated Systems FEATURES 6 LEAD SOT-23 SURFACE MOUNT PACKAGE* TIGHT MATCHING1 EXCELLENT THERMAL TRACKING 2mV 1 SOT-23 TOP VIEW 3µV/°C ABSOLUTE MAXIMUM RATINGS2 B1 E2 B2 @ 25 °C unless otherwise stated