LS113A Search Results

Contextual Info: SN>i4ALS11?A ^N7AA1 S I 1 1A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET D 2 2 6 1 , APRIL 1 9 8 2 -R E V IS E D M A Y 1 9 8 6 • Fully Buffered to Offer Maximum Isolation from External Disturbance S N 54A LS113A . . . J PACKAGE SN 74A LS113A . . . D OR N PACKAGE

PS1J

Contextual Info: TYPES LS113A, SN54AS113, LS113A, SN74AS113 DUAL J K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET D 2 6 6 1 , APRIL 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3 Fully Buffered to O ffer M a x im u m Isolation from External D isturbance S N 54A LS113A, SN 54A S113 . . . J PACKAGE

DM74ALS

Abstract: OM74ALS
Contextual Info: ÉjA Semiconductor LS113A/LS113A Dual J-K Negative-EdgeTriggered Flip-Flops with Preset General Description Features The D M 54 A L S 1 13 A is a d u a l e d g e -trig g e re d flip -flo p . E ach flip -flo p h a s in d iv id u a l J, K,_clock, and p re s e t in p u ts , and

TDA0161 equivalent

Abstract: 1N3393 BDX54F equivalent byt301000 bux transient voltage suppressor ST90R9 ua776mh sgs 2n3055 Transistor morocco mje13007 inmos transputer reference manual
Contextual Info: SHORTFORM 1995 NOVEMBER 1994 USE IN LIFE SUPPORT DEVICES OR SYSTEMS MUST BE EXPRESSLY AUTHORIZED SGS-THOMSON PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF SGS-THOMSON Microelectronics. As used herein:

Contextual Info: MITSUBISHI íDGTL LOGICI TI DEI't.E4*1ñ27 D0ia3flD S MITSUBISHI ALSTTLs M 624 9 82 7 M IT S U B IS H I DG TL L O G IC 7 4 A 91D L S 1 1 3 A P 12380 D DUAL J-K N EG A TIVE EDGE-TRIGGERED FLIP -FLO P W IT H SET T -H (* -o 7 -o y DESCRIPTION PIN CONFIGURATION (TOP VIEW)

Contextual Info: SG60R4 Schottky TTL • Over 180 LS Devices • ALS • FAST TOTAL TTL COMMITMENT «TOTAL • TTL Compatible Macrocell Arrays • RAMs • PROMs General Information TTL in Perspective proved speed — p o w e r product co m p ared to LS as a result o f ad vanced M O S A IC oxide isolated processing.

SN74ALS123

Abstract: SN7401 74LS424 54175 SN74298 SN74265 SN74LS630 SN74LS69 National Semiconductor Linear Data Book Transistor AF 138
Contextual Info: INDEX • FUNCTIONAL SELECTION GUIDE • NUMERICAL FUNCTION INTERCHANGEABILITY GUIDE GENERAL INFORMATION AND EXPLANATION OF NEW LOGIC SYMBOLS ORDERING INSTRUCTIONS AND MECHANICAL DATA 54/74 SERIES OF COMPATIBLE TTL CIRCUITS • PIN OUT DIAGRAMS 54/74 FAMILY SSI CIRCUITS

mc68701 probug

Abstract: MC144100 M68KVM02 user manual m6809 EXORCISER motorola MC146805G2 MC1468705G2 AN/mc68701 probug
Contextual Info: Motorola’s Microcomputer Families i Reliability Data Sheets Mechanical Data E Technical Training Memory Products Logic and Special Function Products Development Systems and Board-Level Products E M motorola MICROCOMPUTERS Prepared by Technical Information Center

74s113a

Abstract: SN74LS113 74ls113a
Contextual Info: LS113A, SN54S113, LS113A, SN74S113A DUAL J K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET D2661, APRIL 1982 - REVISEO MARCH 1988 Fully Buffered to Offer Maximum Isolation from External Disturbance S N 5 4 L S 1 1 3 A , S N 5 4 S 1 1 3 . . . J OR W P A C K A G E

0PIC

Abstract: LS66 SN74L30 84LS 64LS 84ls AX-2016 MAX2719 hy74 L8128A SN7463
Contextual Info: V 84 F A M IL Y S E R IE S 54 S E R IE S M L S S E R IE S B4S S E R IE S 74 S E R IE S 54H S E R IE S 74H S E R IE S 5 4 L 74 F A M IL Y S E R IE S 7 4 L S E R IE S 7 4 LS S E R IE S 74S *00. *04, *H 0 0 ,1404. *L00, 'U M , XSOO, *100, *S04, '10. *20, *30

ic 74 LS 138 DECODER

Abstract: Alu 181 8 bit bcd adder/subtractor f245 motorola lal 2084 TTL 74-series IC LIST internal circuitry for sr flip flop T flip flop IC LS248 4-bit bcd subtractor
Contextual Info: SG 6 0R 4 Schottky TTL • O v e r 180 LS Devices • ALS • FAST • TTL C o m p a tib le M acrocell A rra y s • RAMs • PR O M s 006844 /y err This Material Copyrighted By Its Respective Manufacturer General Inform ation TTL in Perspective proved speed — p o w e r product co m p ared to LS as a

Contextual Info: AVG Semiconductors DDi Technical Data 113 Dual JK Negative Edge-Triggered Flip-Flops with PRESET LS113A LS113A N Suffix Plastic DIP AVG-001 Case This device contains individual J, K, set, and clock inputs. When the clock goes HIGH, the inputs are enabled and data

LS113

Contextual Info: DDT A VG S em iconductors Technical Data Dual JK Negative Edge-Triggered Flip-Flops with PRESET D LS113A D V 7 4 A L S 1 13A N Suffix P lastic DIP AVG-001 Case This device contains individual J, K, set, and clock inputs. When the clock goes HIGH, the inputs are enabled and data

Contextual Info: LS113A, SN54S113, LS113A, SN74S113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET D2661, APRIL 1982 - REVISED MARCH 1988 Fully Buffered to Offer Meximum Isolation from External Disturbance LS113A. SN54S113 . . . J OR W PACKAGE LS113A. SN74S113A . . . O OR N PACKAGE

74aLS808

Abstract: 74ALS677 74ALS468 SN74AS877 SN74LS630 SM54A NCE 7190 74ls631 SN74LS693 TTL Data Book for Design Engineers
Contextual Info: ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS FUNCTION DEVICE AS1032 ALS1034 AS1034 Quad 2-Input OR Buffers/ Drivers A VAILABILITY NOW NOW NOW Hex Drivers NOW ALS1035 Hex Buffers with D-C Outputs NOW AS1036 Quad 2-Input NOR Line Driver NOW ALS1240

SN7401

Abstract: National Semiconductor 4045 transistor bf 175 74ALS569 74AS1008 SN7449 SN74ALS244A SN54ALS1000A SN74ALS519 SN54ALS27
Contextual Info: GENERAL INFORMATION ORDERING INSTRUCTIONS AND MECHANICAL DATA FUNCTIONAL INDEX/SELECTION GUIDE PRODUCT GUIDE ADVANCED LOW-POWER SCHOTTKY AND ADVANCED SCHOTTKY CIRCUITS PROGRAMMABLE LOGIC ARRAYS BETA PRODUCTS EXPLANATION OF NEW LOGIC SYMBOLS CONNECTOR AND KEYBOARD PRODUCTS

LM 4017 decade counter driver

Abstract: 74HC7244A 74HCT7007A 74HC11A 74HC85A 74HC147 decimal to binary encoder cmos 4008 74HC21A 74HC07A 74HC7244
Contextual Info: 2.H IG H SPEED CMOS SELECTION GUIDE NÄ N D NOR A ND OR IN V E R T E R ,B U F FE R 74HC00A 74HCT00A 74HC03A 74HC10A 74HC20A 74HC30 71HC132A 74HC133A GATE 74HC02A 74HCT02A 74HC27A 74HC4002A 74HC4078 74HC08A 74HCT08A 74HC09A 74HC11A 74HC21A 74HC32A 74HCT32A 74HC4072

JRC 45600

Abstract: YD 803 SGS 45600 JRC TDA 7277 TDA 5072 krp power source sps 6360 2904 JRC Sony SHA T90 SA philips HFE 4541
Contextual Info: I SEMICON INDEXES Contents and Introduction Manufacturers' Information V O LU M E 3 INTERNATIONAL INTEGRATED CIRCUITS INDEX 15th EDITION 1997 Numerical Listing of Integrated Circuits Substitution Guide U D C 621.382.3 Diagram s THE S E M IC O N INTERNATIONAL INDEXES

UAA2001

Abstract: MC8500 micromodule m68mm19 1N9388 74ALS643 2N6058 MC145026 2N5160 MOTOROLA MC3340 equivalent pn3402
Contextual Info: MOTOROLA Semiconductors THE EUROPEAN MASTER SELECTION 1982 The total num ber of standard Sem iconductor products available from M otorola ex­ ceeds 15 0 0 0 device types. To most of our custom ers this total presents an overw helm ing choice. The European Master Selection lists approxim ately 4 0 0 0 preferred devices that re­

SN54S113

Abstract: SN74LS113A SN54LS113A SN74 SN74S113A
Contextual Info: LS113A, SN54S113, LS113A, SN74S113A DUAL J-K NEGATIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET D2661, APRIL 1982 - REVISED MARCH 1988 Fully Buffered to Offer Maximum Isolation from External Disturbance SN LS113A . S N 54S 113 . . . J OR W PACKAGE SN 74LS 113A . S N 74S 113A . . . O OR N PACKAGE

54AS113

Contextual Info: TYPES LS113A, SN54AS113, LS113A, SN74AS113 DUAL J K NEGATIVE EDGE TRIGGERED FLIP-FLOPS WITH PRESET D 2 6 6 1 , APRIL 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3 Fully Buffered to O ffer Maxim um Isolation from External Disturbance LS113A, SN 54A S113 . . . J PACKAGE

register file

Abstract: quad-2-input NOT gate LS298 Inverter ls390 LS164 segment
Contextual Info: SELECTION GUIDE Type Number Function Page j AND Gates LS08 Quad 2-Input AND G a t e . 71 LS09 Quad 2-Input AND Gate Open C o lle c to r .