LD3P Search Results

Contextual Info: CH7013B-G Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats • True scale rendering engine supports underscan

Contextual Info: CH7013B Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats • True scale rendering engine supports underscan

CCIR601

Abstract: CCIR656 CH7004C CH7013A 1429 a
Contextual Info: CH7004C Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder with MacrovisionTM 1. FEATURES • • • • • • • • • • • • • • • • • 2. GENERAL DESCRIPTION TM Supports Macrovision 7.X anti-copy protection Pin and function compatible with CH7003 / CH7013A

TC200G02 toshiba

Abstract: TC200G70 bt816 cnh 743 YMUX24H toshiba TC200 CNH 532 TC200E240 Transistor AC 51 0865 75 834 BT16ODFS
Contextual Info: ASIC DATA BOOK TC200G/E SERIES MACROCELLS Non-liner Delay Models 1997 ASIC Data Book TC200G/E SERIES MACROCELLS (Non-linear Delay Models) Published in July, 1996 Document ID: 451V1CA (C) Copyright 1996 TOSHIBA Corporation All Rights Reserved The information contained herein is subject to change without notice. The

lvds to eDP

Abstract: CH9904 CH7515 DisplayPort LVDS Converter LCD Tcon eDP RGB to eDP eDP timing control VESA LD3N eDP 4K panel CH7515A-TF
Contextual Info: CH7515 Chrontel Brief Datasheet CH7515 4 Lane eDP to 4 Channel LVDS Monitor Controller FEATURES • • • • • • • • • • • • • • • • • • • • • • • • • GENERAL DESCRIPTION Supports Embedded DisplayPort eDP Specification

transistor nd8

Abstract: BT4R ISB28000 bt8c pMOS NAND GATE MUX21L AN720 BUT12 BUT18 BUT24
Contextual Info: ISB28000 SERIES HCMOS EMBEDDED ARRAY PRELIMINARY DATA FEATURES Combines Standard Cell features with Sea Of Gates time to market. 0.7 micron triple layer metal HCMOS process featuring self-aligned twin tub N and P wells, low resistance polysilicide gates and thin metal oxide.

Contextual Info: M T C - 2 2 0 0 0 C M O S 0 .7 n Standard Cell Family Services CMOS Family Features • Technology: CMOS 0 .7 m icron, double or triple la y e r m etal digital or m ix e d a n a lo g /d ig ita l processes, featu rin g self­ aligned tw in tub N an d P w ells, polycide or polysilicon

Contextual Info: CH7006C Chrontel CHRONTEL CHRONTEL Digital PC to TV Encoder Features 1. FEATURES 2. GENERAL DESCRIPTION • Function compatible with CH7004 • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats

Contextual Info: CH7009B Chrontel CHRONTEL CHRONTEL CHRONTEL CH7009 DVI / TV Output Device 1. FEATURES 2. GENERAL DESCRIPTION • • • • The CH7009 is a display controller device which accepts a digital graphics input signal, and encodes and transmits data through a DVI DFP can also be supported or TV output

SD 337

Abstract: vga to tv converter ic CH7013A-TF composite to rgb converter ic NTSC 640x480 vga to pal video convertor ic vga to s-video ic 10-64X 8x 8 led dot matrix vga tv converter
Contextual Info: CH7013A Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Pin and function compatible with CH7003 • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both

810E

Abstract: AN-47 CCIR656 CH7008A television internal parts block diagram
Contextual Info: CH7008A Chrontel CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Support for low voltage interface to VGA controller • Universal digital interface accepts YCrCb CCIR656 or RGB (15, 16 or 24-bit multiplexed) video data in

Contextual Info: CH7006C Chrontel CHRONTEL CHRONTEL Digital PC to TV Encoder Features 1. FEATURES 2. GENERAL DESCRIPTION • Function compatible with CH7004 • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats

XCM D2 102 C 12

Abstract: S-AV6
Contextual Info: CH7013B Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both non-interlaced and interlaced formats • True scale rendering engine supports underscan

AN30182A

Abstract: LDO16
Contextual Info: DATA SHEET Part No. AN30182A Package Code No. XBGA025-W-2222AEL Publication date: April 2012 Ver. AEB 1 AN30182A Contents „ Overview …………………………………………….……………………………………………………………… 3

Contextual Info: CH7013A Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Pin and function compatible with CH7003 • Universal digital interface accepts YCrCb CCIR601 or 656 or RGB (15, 16 or 24-bit) video data in both

lvds to eDP

Abstract: T-CON LCD LD3N CH7516 CH9904 eDP timing control VESA LVDS Displayport Converter DisplayPort LVDS Converter lc2n CH7515
Contextual Info: CH7516 Chrontel Brief Datasheet CH7516 4 Lane DP to 4 Channel LVDS Monitor Controller FEATURES • • • • • • • • • • • • • • • • • • • • • • • • • GENERAL DESCRIPTION Supports DisplayPort specification version 1.1a.

CB12000

Abstract: cd 4847 bt8c dc to ac inverter schematic CB22000 ld3p FD11S FD3S BUT12 BUT18
Contextual Info: CB22000 SERIES HCMOS STANDARD CELL GENERAL DESCRIPTION FEATURES 0.7 micron, double layer metal HCMOS4T process featuring self-aligned twin tub N and P wells, low resistance polysilicide gates and thin metal oxide. 2 - input NAND ND2P delay of 0.30 ns (typ)

LDO14

Contextual Info: DATA SHEET Tentative Part No. AN30183A Package Code No. XBGA020-W-1621AEL Publication date: April 2012 Ver. EB 1 AN30183A AN30183A (Tentative) Multi Power Supply (High Efficiency Power LSI) Overview AN30183A is a multi power supply LSI which has high-speed response DCDC converters (1-ch) and regulators (4-ch).

dm024

Abstract: A992 transistor and its equivalent LB 11917
Contextual Info: LOGIC LEA300K Embedded Array 5 Volt ASIC Products Databook O c to b e r 1994 This document contains proprietary information of LSI Logic Corporation. The information contained herein is not to be used by or disclosed to third parties without the express written permission of an officer of LSI Logic Corporation.

Contextual Info: CH7010B Chrontel CHRONTEL CHRONTEL CHRONTEL CH7010 DVI / TV Output Device 1. FEATURES 2. GENERAL DESCRIPTION • • • • The CH7010 is a display controller device which accepts a digital graphics input signal, and encodes and transmits data through a DVI DFP can also be supported or TV output

Contextual Info: CH7013B Chrontel CHRONTEL CHRONTEL CHRONTEL Digital PC to TV Encoder 1. FEATURES 2. GENERAL DESCRIPTION • Chrontel’s CH7013B digital PC to TV encoder is a standalone integrated circuit providing a robust solution for TV output. It provides a universal digital input port to accept a

chrontel CH7011A-T

Abstract: CH7011A-T vga to tv display DAC 0804 AN-41 CCIR-656 CH7011A CH7011A-TF-TR S-AV8
Contextual Info: CH7011A Chrontel CHRONTEL CHRONTEL CHRONTEL CH7011 TV Output Device 1. FEATURES 2. GENERAL DESCRIPTION • TV output supporting graphics resolutions up to 1024x768 pixels • Macrovision 7.1.L1 copy protection support • Programmable digital interface supports RGB and

DisplayPort LVDS Converter

Abstract: RX-2 -G 27Mhz
Contextual Info: CH7516 Chrontel Brief Datasheet CH7516 4 Lane DP to 4 Channel LVDS Monitor Controller FEATURES • • • • • • • • • • • • • • • • • • • • • • • • • GENERAL DESCRIPTION Supports DisplayPort specification version 1.1a.

4 bit dac 0804

Abstract: DAC 0804 la 4430
Contextual Info: CH7010A Chrontel CHRONTEL CHRONTEL CH7010A DVI / TV Output Device 1. FEATURES 2. GENERAL DESCRIPTION • • • • The CH7010A is a display controller device which accepts a digital graphics input signal, and encodes and transmits data through a DVI DFP can also be supported or TV output