L64240 Search Results

Contextual Info: LSI LOGIC L64240 Multi-Bit Filter MFIR Description The L64240 is a 64-tap high-speed transversal filter processor consisting of two 32-tap sec­ tions, with 8-bit wide coefficients and data. The processor can be configured as a 1-D (one-dimensional) filter for radar or other sig­

images of pin configuration of IC 74138

Abstract: L64240 DI-74 18 x 16 barrel shifter 4 bit barrel shifter circuit for left shift opera L64240-15IWCCOM 74138 decoder IC 3-8 decoder 74138 pin diagram
Contextual Info: LSI LOGIC L64240 Multi-Bit Filter MFIR Description The L64240 is a 64-tap high-speed transversal filte r processor consisting of tw o 32-tap sec­ tions, w ith 8-bit w ide coe fficients and data. The processor can be configured as a 1-D (one-dim ensional) filte r fo r radar or other sig­

Contextual Info: LSI LOGIC L64240 Multi-bit Filter MFIR Description mented in 1.5-micron low power HCMOS technol­ ogy, the L64240 is available in 155-lead ceramic pin grid array package. The L64240 is a 64-tap high-speed transversal filter processor consisting of two 32-tap sections, with

TCC-1W

Abstract: fir02 L64240
Contextual Info: LSI LOGIC L64240 Multi-Bit Filter MFIR Description processor suitable fo r radar processing. Im ­ plemented in 1.5 micron draw n date length (0.9-micron effective channel length) low pow ­ er HCMOS technology, the L64240 is available in 155-lead Ceramic Pin Grid A rra y Package.

Contextual Info: L64212 Variable-Length Video Shift Register HVSR Description ^ S I LOGIC. The L64212 is a high-speed variable-length video shift register. This device can be used individually or as video line delays for the L64200 family of processors. The delay of the

Contextual Info: L6 4 212 Variable-Length Video S h ift Register H V S R T m LOGIC Preliminary Description The L64212 is a high-speed variable-length video shift register. This device can be used individually or as video line delays for the L64200 family of processors. The delay of the L64212 can be set to

CXD 4191

Abstract: H9925 jd 1803 b 107 jd 1803 data jd 1803 19 B L64032 L6421 SEL620 L64270QC Pal programming 22v10
Contextual Info: L64032 32 x 32-Bit Multiplier-Accumulator The L64032 is a high-speed 32 x 32-bit parallel multiplier-accumulator which provides single precision 32 x 32 and multiple precision (64 x 64) fixed point multiplication and single precision multiplication with accumulation.

95Pin

Contextual Info: L S I LOGIC Variable-Length Video Shift Register HVSR D e scrip tion T h e L64212 is a h ig h -sp e e d v ariab le -le n gth vid e o shift register. T h is d e v ic e c a n be u se d in d ivid ually or a s v id e o line d e la y s fo r the L64200 fam ily of p ro c e ss o r s . T h e d e la y of the

L64270

Contextual Info: L64270 64 to 64 Crossbar Switch XBAR LSI LOGIC Preliminary Description The L64270 is a 64 to 64 crossbar sw itch in which any of the 64 outputs can be connected to any of the 64 inputs without any blocking con­ straints. In addition, any output can be set to a

Contextual Info: LSI LOCK L64210/L64211 Variable-Length Video Shift Registers The L64210 and L64211 are two high-speed Variable-Length Video Shift Registers. These devices can be used individually or as video line delays for the L64200 series filter proces­ sors. Description

SE115

Contextual Info: LSI LOGIC L64270 64 to 64 Crossbar Switch XBAR Description The L64270 is a 64 to 64 crossbar sw itch in w hich any of the 64 outputs can be connected to any of the 64 inputs w ith o u t any blocking constraints. In addition, any output can be set to a constant value or put in a high impedance