L2652 Search Results

Contextual Info: D ecem ber 1994 PRELIMINARY Micro Linear M L2652/M L2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The M L 2652 , 1OBASE-T Physical Interface C hip, is a com plete physical interface for tw isted pair and AUI Ethernet applications. It com bines a 10BASE-T M A U ,

Contextual Info: M ay 1992 PRELIM IN ARY Micro Linear L2652 10Base-T Physical Interface Chip GEN ERAL DESCRIPTION FEATURES The M L2652, 10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and A U I Ethernet applications. It combines a 10BASE-T M AU ,

L4662

Abstract: ML4663 l467
Contextual Info: Micro Linear Networking Products Selection Guide Ethernet, 10 Mbps Part Number Description LED Outputs Autopolartity Package Types M L2652 10BASE-T Physical Layer with A U I Port 6 Yes 44-Pin PLCC M L2653 10BASE-t Physical Layer 2 Yes 28-Pin PLCC 44-Pin TQFP

sem 3040

Abstract: sem 3040 ic Dp83233
Contextual Info: ÌO/IOOBASE-T MAGNETICS MODULE Pulse A TECHNITROL Designed for Transmission UTP-5 Cable COMPANY Combines 10Base-T and 100Base-TX signals for a one-connector port Designed to withstand infrared and vapor phase soldering Pick and place compatible Low profile, surface mount package

RI-45

Abstract: P839-08
Contextual Info: M ay 1992 Micro Linear P R E L IM IN A R Y L2652 10Base-T Physical Interface Chip G E N E R A L D E S C R IP T IO N FEATU RES Th e M L 2 6 5 2 , 10 B A S E-T P h ysical Interface C h ip , is a com p lete p h ysical interface for tw isted pair and A U I Ethernet ap p licatio n s. It co m b in es a 10 B A S E-T M A U ,

L26XX

Abstract: L2671 L-26-116 L-26-115 26160 L-26-67 L26128
Contextual Info: Passive Delay Lines Delay Range 5-450 nsec STYLE L-26 14-pin SIP 10 equally-spaced taps Td/Tr = 5:1 (typ.) For test conditions see page 16. Compatible With Various Logic Systems including TTL and Video Circuits. CONNECTION Total Delay Tolerance = ± 5% or

LED IR for Tx, RX pair

Abstract: m12653 APPLICATIONS OF 41 LED BLINKER CIRCUIT
Contextual Info: Aprii 1997 % M i c r a L in e a r L2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES The L2652,10BASE-T Physical Interface Chip, is a complete physical interface for twisted pair and AUI Ethernet applications. It combines a 10BASE-T MAU,

TX151n

Abstract: H441 L-265 P8390 IC K140
Contextual Info: Aprii 1997 % M i c r o L in e a r L2652/ML2653 10Base-T Physical Interface Chip GEN ERAL D ESCRIPTION FEATURES The M L2 6 5 2 , 10BASE-T Physical Interface C hip , is a com plete physical interface for twisted pair and AUI Ethernet applications. It com bines a 10BASE-T M A U ,

Contextual Info: D ecem b e r i 998 ^ÉL M icro Linear L2652/ML2653 10Base-T Physical Interface Chip GENERAL DESCRIPTION FEATURES TheM L 2652, 10BASE-T P h y sic a l Interface C hip, i s a com p te te p h y sic a l interface ibrtw isted p a i r an d AU I E th e m e ta p p lic a tio n s . Itcom b in e s a 10BASE-T M AU ,

L2612

Contextual Info: Passive Delay Lines Delay Range 5-450 nsec STYLE L-26 14-pin SlP 10 equally-spaced taps -r- i /-r j /, \ Td/Tr = 5 i 1 (typ.) For test con ditio ns see page 16. r- Com patible W ith Various Logic Systems including TTL and Video Circuits. CONNECTION GROUND

transistor T43

Abstract: T6170
Contextual Info: D ecem b er 1994 P R E L IM IN A R Y Micro Linear L2652/ML2653 10Base-T Physical Interface Chip G EN ER A L D ESC R IP TIO N FEATURES The M L 2 6 5 2 , 10 B A SE-T Physical Interface C h ip , is a com p lete ph ysical interface for twisted pair and A U I