KS54HCTLS Search Results

hctls367a

Abstract: KS74HCTLS
Contextual Info: KS54HCTLS k s 7 4 h c tls . KS54HCTLS - „ k s 7 4 h c tls 365A/367A - a 366A/368A Hex Bus-Drivers with 3-State Outputs 16 Dip Unit: mm These high-speed Hex bus drivers are designed specifically to improve both the performance and density of 3-state memory address drivers,

D73-Y

Abstract: D73y ic 74145
Contextual Info: SAMSUNG SEM IC O N D U C T OR INC 05 DEI 7^4145 . KS54HCTLS O O KS74HCTLS ~ 000^301 S T -4 3 -a i Quad 2-Input OR Gates FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS

Contextual Info: SAMSUNG SEMICONDUCTOR INC OS KS54HCTLS KS74HCTLS De J 7 ^ 4 1 4 2 0D0b3T3 8-Bit Parailel-iri/Serial-Out Shift Registers with Clear 166 . - o 9 - < *

SAMSUNG VCP POWER SUPPLY

Abstract: kss4
Contextual Info: SAMSUNG SEMICONDUCTOR IN C 02 KS54HCTLS O Q Q KS74HCTLS DE I 7 T b 4 1 4 S .z .y z ^ 7 z " ~ DDDtiSm t, | ~ Quad 2-Port Registers FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS

TI33

Abstract: KS74HCT
Contextual Info: SAMSUNG SEMICONDUCTOR KS54HCTLS KS74HCTLS 107A INC DS D E | 7^b414E □□□ti333 2 | Dual J-K Negative-Edge-Triggered Flip-Flops with Clear FEATURES DESCRIPTION • Function, pin-out, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS

Contextual Info: SAHSU N G SE tiIC O N D U C T O R INC 05 Octal D-Typè Transparent Latches ‘ with 3-State Outputs "T-" KS54HCTLS KS74HCTLS FEATURES D e I 7 ^ m MS DG Dt ifTî 3 DESCRIPTION . • 8 latches In a single package • Full parallel access for loading • Function, pln-out, speed and drive compatibility with

Contextual Info: SAMSUNG S E M I CO ND UCTOR INC D2 D Ë | 7cit,m42 □□□ba'H b - 2/ KS54HCTLS 0 /1 KS74HCTLS Dual 4-Input NAND Gates FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54f74LS logic family • Low power consumption characteristic of C M O S

HCTLS157

Abstract: ic sc 4145 sc 4145
Contextual Info: SAMSUNG SEM ICO ND UC TO R INC 05 KS54HCTLS 1 Ç 7 / 1 C Q KS74HCTLS • V U I V O D Ë | 711.4:1.45 0D0L.377 0 Quad 2-Line to 1-Line Data Selectors/Multiplexers FEATURES DESCRIPTION • Function, pln-out, speed and drive compatibility with 54/74LS logic family

KS74HCT

Contextual Info: SAMSUNG SEMICONDUCTOR KS54HCTLS KS74HCTLS INC OB DE J ODObMSS 1 | ' ' Dual CarrySave Full Adders FEATURES DESCRIPTION • • • • • For use In high-speed wallace-jree summing Fast addition operation Low power consumption characteristic o l CMOS High output current drive: lot.= 8mA @ Vol = 0.5V

Contextual Info: SAMSUNG SE MI CO NDUCT OR INC DE DE • 7 ^ 4 1 4 5 KS54HCTLS / ? 7 / | KS74KCTLS U i u □ □0fc.5flS 7 4-By-4 Register Files with with 3-State Outputs FEATURES DESCRIPTION • Separate Read/Write Addressing Permits Simultaneous Reading and Writing • Expandable to 512 Words of N-bits

Contextual Info: SAMSUNG SEMICONDUCTOR INC GE KS54HCTLS 4 A Q KS74HCTLS DE • 7 ^ 4 1 4 2 GDÜtiBtE T 8-Line to 3-Line Priority Encoders Preliminary Specifications FEATURES DESCRIPTION • Encodes eigh t data lin e s in priority • Provides 3-bit binary priority code The ’148 provides three bits of binary coded output

samsung nand derating

Contextual Info: KS54HCTLS KS74HCTLS 7 9 6 4 142 Synchronous 4-Bit Decade and Binary Counters 162AI163A SAMSUNG S EMI C ON D UC T OR INC 02E 06380 D FEATURES DESCRIPTION • • • • • These are synchronous, presettable 4-bit binary counters featuring internal carry-look-ahead for high-speed counting.

Contextual Info: SAMSUNG SEMICONDUCTOR INC OS KS54HCTLS KS74HCTLS 74A D E I T^bMlME □ 00 Dual D-Type Positive-Edge-Triggered Flip-Flops with Preset and Clear 7 DESCRIPTION FEATURES • Function, pln-out, speed and drive compatibility with 54/74LS logic family , • Low power consumption characteristic of CMOS

L3370

Contextual Info: SAMSUNG SEMICONDUCTOR INC 05 De J 7 T b 4 m e 000t,33b fl Dual J-K Positive Edge-Triggered Flip-Flops with Preset and Clear KS54HCTLS I f i Q A KS74HCTLS ~ T - " 0 ~ 7 -* c > ~ 7 DESCRIPTION FEATURES • Function, pin-out, speed and drive compatibility with

HCTLS

Abstract: L37s
Contextual Info: SAMSUNG SEM IC O N D U C T OR INC DE DEI 7^4145 Q00b374 S 1 6 3 7 4 D , i - C . '7 ' ^ / - S 'S ^ Dual 2-to-4 Line Decoders/Demultiplexers KS54HCTLS -f/T /T KS74HCTLS l w " ' • - • sT FEATURES DESCRIPTION • Typical applications: Dual 2-to-4 line decoder

filpflops

Contextual Info: SAMSUNG S E M I CON DU CT OR INC 02 KS54HCTLS " 7 0 A KS74HCTLS D E I T i b 4 IMS 000b315 D Dual J-K Negative-Edge-Triggered Flip-Flops with Clear - T - % > - 0 7 ~ o ~7 FEATURES DESCRIPTION • Function, pinout, speed and drive compatibility with 54/74LS logic famll/

AM29828

Contextual Info: SAMSUNG SEMICO NDUCT OR INC □ 2 KS54HCTLS KS74HCTLS D E | 7 ^ 4 1 4 2 OODbblM 0 8-Bit Bus Interface Flip-Flops with 3-State Outputs Preliminary Specifications 7 ^ ¥ & - 0 r7 ' C3S FEATURES DESCRIPTION • Functionally Equivalent to AMD’s Am29825 and Am29828

Contextual Info: 1 S A M S U N G S E M I C O N D U C T O R INC OE D ElTTL^m a 5181519 KS74HCTLS 520/521/522 000t,S23 7 8-Bit Identity Comparators FEATURES DESCRIPTION • Compares two 8-bit words • ’518, ’520 and ’522 have 20KR Pull-up resistors on Q Inputs These identity comparators perform comparisons on two

HCTLS

Abstract: KS74HCTLS DIODE S4 2G tl81 KS74HCT
Contextual Info: Octal Buffers and Line Drivers with 3-State Outputs These high-speed octal buffers and line drivers are designed specifical­ ly to improve both the performance and density of 3-state memory ad­ dress drivers, clock drivers, and bus-oriented receivers and transmitters.

KS74HCTLS

Contextual Info: Octal Buffers and Line Drivers with 3-State Outputs These hig h -sp ee d octal b u ffe rs and line drive rs are desig n ed s p e c ific a l­ ly to im prove both the perform ance and d e n sity o f 3 -sta te m em ory ad­ dress drivers, clo ck drivers, and bus-oriented receivers and transm itters.

5HC7

Contextual Info: SAMSUNG SEMICONDUCTOR INC OE k s 54 h é t i 3s OOQbBfl6] 7 DE 1 7 T t m 4 S ^ 8-Bit Seriabln/Parallel-Out Shift Registers KS74HCTLS FEATURES DESCRIPTION • • • • • These are high-speed 8-bit parallel-load or serial-in shift registers with complementary serial outputs available from

Contextual Info: SÄiiSÜNfa s t n l C O N D U C T OR INC Q2 DEj| 7TbM145 OODbSfiT 4 J k Itw c tlI 6 7 9 /6 8 0 12-Bit Address Comparators Preliminary Specifications FEATURES DESCRIPTION • ’6 7 9 :12-bltto 4-bit comparator with enable • *680:12-bit to 4-blt comparator with latch

4049 logic gate

Abstract: 4049 cmos
Contextual Info: :g g í£ ^ Hex Logic Level Down Converters T - X2.^/ FEATURES DESCRIPTION • Modified Input structure allows voltages up to 15V • Function, pinout, speed and drive compatibility with 54/74LS logic family • Low power consumption characteristic of CMOS

equivalent data book of 10N60 mosfet

Abstract: MC14016CP GD4511 an-6466 CX 2859 SMD 74AC14 spice 6120* harris HCF4018be 7028 SMD Transistor spice irfbc40
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