JCI A3 Search Results

9738a

Abstract: TJ-102
Contextual Info: J lo h N S O N AEP Com petitor Cross Reference Components JC I 1-104. . 131-6701-401 1-109. . 131-6701-201 1-110. . 131-6701-301 1-113. . 131-6901-801 1-118/063 . . 131-6701-801

R113183

Abstract: 9228-N-140 R125705 8156-a-0440
Contextual Info: Cross Reference AEP 1-104 1-109 1-110 1-113 1-118/063 1-119 1-122 1-125 1-142 1-301/188 1-301/196 1-302/188 1-302/196 1-303/188 1-303/196 1-305/188 1-305/196 1001-1541-010 1001-1571-002 1001-1571-003 1001-7541-010 1001-7571-002 1001-7571-003 1002-1541-010

6N17

Abstract: real time application and product for fir iir lms k1 4 3n B-26 B-28 DSP56100 mac 226 IIR FILTER implementation in c language B-213
Contextual Info: Freescale Semiconductor, Inc. APPENDIX B Freescale Semiconductor, Inc. DSP56100 BENCHMARKS T T T P1 T T P2 P4 T T MOTOROLA P3 For More Information On This Product, Go to: www.freescale.com T B-1 Freescale Semiconductor, Inc. Freescale Semiconductor, Inc.

6N14B

Abstract: Motorola 132 IIR FILTER implementation in c language
Contextual Info: APPENDIX B DSP56100 BENCHMARKS T T T P1 T T P3 P4 T T MOTOROLA P2 T B-1 SECTION CONTENTS B.1 B.2 B.2.1 B.2.2 B.2.3 B.2.4 B.2.5 B.2.6 B.2.7 B.2.8 B.2.9 B.2.10 B.2.11 B.2.12 B.2.13 B.2.14 B.2.15 B.2.16 B.2.17 B.2.18 B.2.19 B.2.20 B.2.21 B.2.22 B.2.23 B.2.24

Contextual Info: Semiconductor MTC8104M36-XX2A1 -01 DRAM CARD DESCRIPTION The MTC8104M36-xx2Al-01 is a 4M-byte dynamic RAM card composed of lM-word x 36-bit, being a 88-pin 2-piece type card proposed by the DRAM card guide-line of JEIDA. This provides a built-in buffer IC together with the DRAM device.

LMS adaptive filter

Abstract: 13N2 DSP56800 adaptive FILTER implementation in c language FIR FILTER implementation in c language b2131 1N7 motorola
Contextual Info: APPENDIX B DSP BENCHMARKS T T T P1 T T P2 P3 P4 T T DSP56800 Family Manual T B-1 DSP Benchmarks B.1 B.2 B-2 INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-3 BENCHMARK CODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-4

ENS150-11A

Contextual Info: ENS150-11A ' > \ u > - y - - i ¿ > y ^ ± S S A : Outline Drawings y *v - ' < SILICON SURGE ABSORBERS 8S » m 01 *r-* x,n $• > «» *) D2 sB(s¡s(íA,Ktea) P 7 I* 7.6± 0.3 ■ L 1.6d:0.3 ' 'J l: 1.6±0.3 u □ m ¿±0.1 '• Maxim um Ratings and Characteristics

MM1106

Contextual Info: DUAL-IN-LINE SLOTTED HEADERS Solder Tail and Wrapost Open Frame Series 160,162,163 • Series 160, 162,163 DIL Headers are equipped with slotted heads to accept wires or component leads. • Terminations are pluggable .018" diameter solder tails M-M# 0282 ,

a6w 58

Abstract: i-089
Contextual Info: DECEMBER 2, 1996 TEST REPORT #96291B TEMPERATURE/HUMIDITY CYCLING loo CYCLES OF DURABILITY CLT/TMM (10 MICROINCHES GOLD) SAMTEC CORPORATION APPROVED BY: LUANNE WITT PROGRAM MANAGER CONTECH RESEARCH, INC. 1 Contech Research CERTIFICATION This is to certify that the evaluation described herein was

BA6860FS

Abstract: BA6862FS transistor a3h
Contextual Info: Motor driver ICs 3-phase motor driver BA6860FS/BA6862FS The BA6860FS and BA6862FS are 3-phase, full-wave, pseudo-linear motor drivers suited for driving movie camera capstan motors that can be operated at low voltages. The ICs have a torque ripple cancellation circuit to reduce

sda 20160

Abstract: SDA-2083 sda 2083 sda2083 SDA20160 IC A5162 siemens sda 2083 114H 125H 125L
Contextual Info: Data Slicer for Teletext SDA 5231-5 Preliminary Data Bipolar IC Features Crystal-stable data clock regeneration for a bit rate ~ of 6.9375 MHz ® Separation and regeneration of teletext information • Separation of the horizontal and vertical synchroni­

63B23

Contextual Info: SONY C X A 1391Q /R Processing IC for Complementary Color Mosaic CCD Camera Description The CXA1391Q/R is a bipolar IC developed for signal processing in complementary color mosaic CCD cameras. Features • Low power consumption 170mW • Number of delay lines used for signal processing

FX214LG

Abstract: HP 4716 FX224 224J FX214 CAPACITOR 224J 224j capacitor VOICE SCRAMBLER hp 2631 273J CAPACITOR
Contextual Info: CIVIL Sem iconductor Products m m PRODUCT INFORMATION ~ f- l5 ~ 0 l- ? 0 FX214 FX224 FX234 £ VSB* Audio Scram bler MSE D 237 437b 0DD0411 E ICriCR Publication D/214/2 November 1987 Provisional Issue Features/Applications • MI CROCIRCUITS CONSUMER *Variable Split-Band Frequency

HM511000-15

Abstract: smd code marking CK FX802 FX802J FX809 QDD0171 TMS4256 15x45
Contextual Info: FX802 DVSR C o d e c CONSUMER 45E D • MICROCIRCUITS -r.7S.n 2 3 7 4 3 7 b OO O O l b l 5 H C M C R A9 A8 A7 AS A5 _ A4 A3/ECK A2/DCK AO/ENO A1/DEI ENCOOER (DECODER OUT IN) DRAM ADDRESS LINES_ _ Fig. 1 FX802 DVSR Codec

bm 5069

Abstract: ati x600 x1300 ATI nec 2401 ati x1600 S239 S340
Contextual Info: CM rN G m V£ ¡8 U > IE< £ »V o R co O _£• C CM ? p a rs Ki a tf1 « îz. H G » « i J » 45 O E X S a j- a IV A ft ï* -> 9 O ’U 3 n A Cn to G -K Q £ sH « « a •w O —1 f î o ■R » a V K « « A «t -t0* <?s >• ■U « I s £ ïh «1 f i

8W dynamo

Contextual Info: TMS417809A, TMS427809Â, TMS427809AP 2097152 BY 8-BIT EXTENDED DATA OUT DYNAMIC RANDOM-ACCESS MEMORIES _ SMKS694B-AUGUST 1996 - REVISED NOVEMBER 1997 This data sheet is applicable to all TMS417809As and TMS427809A/Ps symbolized by Revision “E” and subsequent

MBC 100-60

Abstract: CT 4A05 tic 1260 scr texas mil-std-1750a pin diagram for IC cd 1619 cp efd pmr cd 1619 CP pin diagram for IC cd 1619 cp in fm nim ttl MIL-STD-1750* BX
Contextual Info: LSI LOGIC c L64500 LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 95035 4 0 8 .4 3 3 . 8 0 0 0 Telex 172153 MIL-STD-1750A Microprocessor O 00245 0 Preliminary 3-YTO . Description The LSI Logic L64500 is a monolithic 1.5-micron drawn (0.9-effective HCMOS chip which implements

pin diagram for IC cd 1619 cp in fm

Abstract: ako 450 169 ct 4a05 MBC 100-60 LSI 1750A processor architecture cd 1619 CP ic pin details MIL-STD-1750* BX KASUGA ako speed control l64550 microprocessor
Contextual Info: LSI LOGIC { L64500 M IL S T D 17 5 0 A Microprocessor LSI Logic Corporation 1551 McCarthy Blvd Milpitas CA 9 5 0 3 5 408.433.8000 Telex 172153 ip I O 002450 Preliminary s> o /S^ L 3 l 3-Y T P . Description The LSI Logic L64500 is a monolithic 1.5-micron drawn (0.9-effective HCMOS chip which implements

Contextual Info: a WHITE /MICROELECTRONICS WC32P360-25XM 68360 FEATURES • In te rru p ts: ■ 2 5 M H z O p e ra tin g F re q u e n cy ■ M ilita r y T e m p e ra tu re R a n ge : - 5 5 ° C to + 1 2 5 °C • S e v e n E x te rn a l IRQ L in e s ■ P a c k a g in g • 12 Port P in s w ith In terru p t C a p a b ilit y

Contextual Info: PRELIMINARY DATA SHEET CMOS INTEGRATED CIRCUIT juPD42S17405L, 4217405L 3.3 V OPERATION 16 M BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, HYPER PAGE MODE Description The jjPD42S17405L, 4217405L are 4 194 304 words by 4 bits CMOS dynamic RAMs with optional hyper page

jl audio 500 1 schematics

Abstract: T0RX173 AES17-1991 AN55 CDB4327 CS4327 CS4327-KS CS8412
Contextual Info: CS4327 Low Cost, 20-Bit, Stereo, Audio D/A Converter Features Description • • • • • The CS4327 is a complete stereo digital-to-analog out­ put system. In addition to the traditional D/A function, the CS4327 includes a digital interpolation filter followed by

Contextual Info: MITSUBISHI LSIs MH4S64ALG -8 268435456-BIT 4194304 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH4S64ALG is 4194304 - word by 64-bit Synchronous DRAM module. This consists of four industry standard 4M x16 Synchronous DRAMs in TSOP and one industory standard EEPROM in SOP.

Contextual Info: Preliminary Speo. M it s u b is h i lsis Some contents are subject to change w ithout notice. MH8S64BBKD -7,-8,-10 536870912-BIT 8388608 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH8S64BBKD is 8388608 - word by 64-bit Synchronous DRAM module. This consists of eight

Contextual Info: Preliminary Speo. MITSUBISHI LSIs Some contents are subject to change w ithout notice. MH4S64BLG -7,-8,-10 268435456-BIT 4194304 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH4S64BLG is 4194304 - word by 64-bit Synchronous DRAM module. This consists of four