JCI A3 Search Results

9738a

Abstract: TJ-102
Contextual Info: J lo h N S O N AEP Com petitor Cross Reference Components JC I 1-104. . 131-6701-401 1-109. . 131-6701-201 1-110. . 131-6701-301 1-113. . 131-6901-801 1-118/063 . . 131-6701-801

6N17

Abstract: real time application and product for fir iir lms k1 4 3n B-26 B-28 DSP56100 mac 226 IIR FILTER implementation in c language B-213
Contextual Info: Freescale Semiconductor, Inc. APPENDIX B Freescale Semiconductor, Inc. DSP56100 BENCHMARKS T T T P1 T T P2 P4 T T MOTOROLA P3 For More Information On This Product, Go to: www.freescale.com T B-1 Freescale Semiconductor, Inc. Freescale Semiconductor, Inc.

6N14B

Abstract: Motorola 132 IIR FILTER implementation in c language
Contextual Info: APPENDIX B DSP56100 BENCHMARKS T T T P1 T T P3 P4 T T MOTOROLA P2 T B-1 SECTION CONTENTS B.1 B.2 B.2.1 B.2.2 B.2.3 B.2.4 B.2.5 B.2.6 B.2.7 B.2.8 B.2.9 B.2.10 B.2.11 B.2.12 B.2.13 B.2.14 B.2.15 B.2.16 B.2.17 B.2.18 B.2.19 B.2.20 B.2.21 B.2.22 B.2.23 B.2.24

LMS adaptive filter

Abstract: 13N2 DSP56800 adaptive FILTER implementation in c language FIR FILTER implementation in c language b2131 1N7 motorola
Contextual Info: APPENDIX B DSP BENCHMARKS T T T P1 T T P2 P3 P4 T T DSP56800 Family Manual T B-1 DSP Benchmarks B.1 B.2 B-2 INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-3 BENCHMARK CODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-4

ENS150-11A

Contextual Info: ENS150-11A ' > \ u > - y - - i ¿ > y ^ ± S S A : Outline Drawings y *v - ' < SILICON SURGE ABSORBERS 8S » m 01 *r-* x,n $• > «» *) D2 sB(s¡s(íA,Ktea) P 7 I* 7.6± 0.3 ■ L 1.6d:0.3 ' 'J l: 1.6±0.3 u □ m ¿±0.1 '• Maxim um Ratings and Characteristics

MM1106

Contextual Info: DUAL-IN-LINE SLOTTED HEADERS Solder Tail and Wrapost Open Frame Series 160,162,163 • Series 160, 162,163 DIL Headers are equipped with slotted heads to accept wires or component leads. • Terminations are pluggable .018" diameter solder tails M-M# 0282 ,

a6w 58

Abstract: i-089
Contextual Info: DECEMBER 2, 1996 TEST REPORT #96291B TEMPERATURE/HUMIDITY CYCLING loo CYCLES OF DURABILITY CLT/TMM (10 MICROINCHES GOLD) SAMTEC CORPORATION APPROVED BY: LUANNE WITT PROGRAM MANAGER CONTECH RESEARCH, INC. 1 Contech Research CERTIFICATION This is to certify that the evaluation described herein was

63B23

Contextual Info: SONY C X A 1391Q /R Processing IC for Complementary Color Mosaic CCD Camera Description The CXA1391Q/R is a bipolar IC developed for signal processing in complementary color mosaic CCD cameras. Features • Low power consumption 170mW • Number of delay lines used for signal processing

FX214LG

Abstract: HP 4716 FX224 224J FX214 CAPACITOR 224J 224j capacitor VOICE SCRAMBLER hp 2631 273J CAPACITOR
Contextual Info: CIVIL Sem iconductor Products m m PRODUCT INFORMATION ~ f- l5 ~ 0 l- ? 0 FX214 FX224 FX234 £ VSB* Audio Scram bler MSE D 237 437b 0DD0411 E ICriCR Publication D/214/2 November 1987 Provisional Issue Features/Applications • MI CROCIRCUITS CONSUMER *Variable Split-Band Frequency

HM511000-15

Abstract: smd code marking CK FX802 FX802J FX809 QDD0171 TMS4256 15x45
Contextual Info: FX802 DVSR C o d e c CONSUMER 45E D • MICROCIRCUITS -r.7S.n 2 3 7 4 3 7 b OO O O l b l 5 H C M C R A9 A8 A7 AS A5 _ A4 A3/ECK A2/DCK AO/ENO A1/DEI ENCOOER (DECODER OUT IN) DRAM ADDRESS LINES_ _ Fig. 1 FX802 DVSR Codec

TSOP 14l

Abstract: am29f016b-90 A20-A11
Contextual Info: PRFUivllNAR AMD£1 A m 2 9 F 0 1 6 B 16 Megabit 2 M x 8-Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory DISTINCTIVE CHARACTERISTICS • 5.0 V ± 10%, single power supply operation — Minimizes system level power requirements ■ Manufactured on 0.35|im process technology

bm 5069

Abstract: ati x600 x1300 ATI nec 2401 ati x1600 S239 S340
Contextual Info: CM rN G m V£ ¡8 U > IE< £ »V o R co O _£• C CM ? p a rs Ki a tf1 « îz. H G » « i J » 45 O E X S a j- a IV A ft ï* -> 9 O ’U 3 n A Cn to G -K Q £ sH « « a •w O —1 f î o ■R » a V K « « A «t -t0* <?s >• ■U « I s £ ïh «1 f i

8W dynamo

Contextual Info: TMS417809A, TMS427809Â, TMS427809AP 2097152 BY 8-BIT EXTENDED DATA OUT DYNAMIC RANDOM-ACCESS MEMORIES _ SMKS694B-AUGUST 1996 - REVISED NOVEMBER 1997 This data sheet is applicable to all TMS417809As and TMS427809A/Ps symbolized by Revision “E” and subsequent

Contextual Info: a WHITE /MICROELECTRONICS WC32P360-25XM 68360 FEATURES • In te rru p ts: ■ 2 5 M H z O p e ra tin g F re q u e n cy ■ M ilita r y T e m p e ra tu re R a n ge : - 5 5 ° C to + 1 2 5 °C • S e v e n E x te rn a l IRQ L in e s ■ P a c k a g in g • 12 Port P in s w ith In terru p t C a p a b ilit y

Contextual Info: MITSUBISHI LSIs MH4S64ALG -8 268435456-BIT 4194304 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH4S64ALG is 4194304 - word by 64-bit Synchronous DRAM module. This consists of four industry standard 4M x16 Synchronous DRAMs in TSOP and one industory standard EEPROM in SOP.

Contextual Info: Preliminary Speo. M it s u b is h i lsis Some contents are subject to change w ithout notice. MH8S64BBKD -7,-8,-10 536870912-BIT 8388608 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH8S64BBKD is 8388608 - word by 64-bit Synchronous DRAM module. This consists of eight

Contextual Info: Preliminary Speo. MITSUBISHI LSIs Some contents are subject to change w ithout notice. MH4S64BLG -7,-8,-10 268435456-BIT 4194304 - WORD BY 64-BIT SynchronousDRAM DESCRIPTION The MH4S64BLG is 4194304 - word by 64-bit Synchronous DRAM module. This consists of four

Contextual Info: Preliminary Speo. MITSUBISHI LSIs Some contents are subject to change w ithout notice. MH4S72BLG -7,-8,-10 301989888-BIT 4194304 - WORD BY 72-BIT SynchronousDRAM DESCRIPTION The MH4S72BLG is 4194304 - word by 72-bit Synchronous DRAM module. This consists of five

Contextual Info: Preliminary Speo. MITSUBISHI LSIs Some contents are subject to change w ithout notice. MH8S72BALD -7,-8,-10 603979776-BIT 8388608 - WORD BY 72-BIT SynchronousDRAM DESCRIPTION The MH8S72BALD is 8388608 - word by 72-bit Synchronous DRAM module. This consists of nine

A244D

Abstract: DSP56300 A721 8N9 marking B3710 equivalent A638 A693 A659
Contextual Info: DSP56300 24-BIT DIGITAL SIGNAL PROCESSOR FAMILY MANUAL Motorola, Inc. Semiconductor Products Sector DSP Division 6501 William Cannon Drive, West Austin, Texas 78735-8598 TABLE OF CONTENTS Paragraph Number Title Page Number 1 CORE DESCRIPTION . 1-1

Contextual Info: b427525 0042323 TbS » N E C E f MOS INTEGRATED C IR CU IT H / P D 4 2 S 1 6 1 6 L , 4 2 S 1 7 1 6 L , 4 2 S 1 8 1 6 L 16 M BIT D Y N A M IC RAM 3 .3 V FAST PAGE M O D E & BYTE R E A D /W R IT E M O DE -P R E L IM IN A R Y -D ESCRIPTIO N

SSL100

Abstract: SSL100 SN MP15N MP34N SE090 6RS21 a12 diod MP45N MD11N ACBL
Contextual Info: "'ì5r'cílAÑGg"' MINICARTRIDGE RELAYOUT 1.PCMCIA SW5 0 3 J U M P E R SETTING GUIDELINE ON PAGE 6 PINI on OFF ON OFF SW502 m o fnt tM ïh \ 6 .C P U M / B D I D O — 3 F U N C T I O N T O BE DEF I N E D , D E F A U L T ON T O S E L E C T M / B D IDO S B

Contextual Info: P B t i GEC plessey PRELIMINARY INFORMATION DS3748-2.2 June 1993 JMA31750 HIGH PERFORMANCE MIL-STD-1750 MICROPROCESSOR The G EC P le s s e y M A 31 750 is a s in g le -c h ip microprocessor that implements the full MIL-STD-1750A instruction set architecture, or Option 2 of Draft MIL-STD1750B. The processor executes all mandatory instructions and

Contextual Info: 51 GEC PLESSEY PR ELIM IN A R Y INFO R M ATIO N S E M I C O N D U C T O R S DS3748-4 2 MA31750 HIGH PERFORMANCE MIL-STD-1750 MICROPROCESSOR The GEC Plessey MA31750 is a single-chip microprocessor that implements the full MIL-STD-1750A instruction set architecture, or Option 2 of Draft MIL-STD1750B. The processor executes all mandatory instructions and