IR 2210 IC Search Results

HD46505

Abstract: VOGT 406 69 hd46821 vogt transformer 406 69 vogt transformer 406 77 HD46850 hd46505s vogt transformer 406 06 020 HD63484 HD468B21
Contextual Info: • ■ ■ fmSÊM i b b h h h i 8/16-BIT PERIPHERAL LSI DATA BOOK H IT A C H I MEDICAL APPLICATIONS H itachi’s products are not authorized for use in M E D IC A L A P P L IC A ­ T IO N S , including, but not lim ited to, use in life support devices without the

Contextual Info: HD74LS13. Dual 4-input Positive NAND Schmitt Triggers IP IN ARRANGEMENT IC IR C U IT SC H EM A TIC O ^ •ELECTRICAL CHARACTERISTICS Ta= - 20- + 75C ) Item Symbol T e s t Conditions Vt + Vcc = 5 V Input threshold voltage Vt ~ Vcc = 5V H ysteresis Vt +- Vt

Contextual Info: 2 4 T H IS D R A W IN G S U N P U B L IS H E D . RELEASED FO R ALL C O P Y R IG H T By P U B L IC A T IO N R IG H TS REVISIO NS RESERVED. G - LTR D E S C R IP T IO N AD' R EVISED PER DATE ECO -1 1-00491 7 DWN APVD RK HMR MAR1 D D FOR 9 .53 N S U L A T IO N

Contextual Info: H D 74LS 27 •T rip le 3-input Positive NOR Gates IP IN ARRANGEMENT IC IR C U IT S C H E M A T IC H •ELECTRICAL CHARACTERISTICS Ta= - 2 0 - +75°C ) Item Symbol T e s t C onditions min typ* max V lH 2 .0 - - V lL - - 0 .8 Unit Input voltage V VOH Vcc = 4 . 7 5 V , V / ¿ = 0 . 8 V . f o w = - 4 0 0 / í A

74LSOO

Contextual Info: •D u a l 4-input Positive NAND Gates ¡C IR C U IT S C H E M A T IC ^ IP IN ARRANGEMENT •ELECTRICAL CHARACTERISTICS T a = - 20- + 75‘C ) Item Sym bol T e s t Conditions min typ* Unit 2 .0 - - V VlL - - 0 .8 V 2 .7 - - V Input voltage VoH Kcc —4 .7 5 V , K/l = 0 . 8 V , / o» = - 4 0 0 M

em 495 b12

Abstract: HB561003
Contextual Info: HB561003 Series 262,144-word x 9-bit Dynamic Random Access Memory Module The H 8 5 6 1 0 0 3 is a 2.25 M dynam ic random-access m em ory module organized as 26 2,144 x 9 bits [bit nine PD, PQ is generally used for parity and is controlled b y P C A S ] in a 30-pin single-in-line package comprising

p627

Contextual Info: M E T R IC NEMA Terminal Blocks BUCHANAN DlTiP i m .’l! Catalog 1307612 Revised 7-01 :h e s 600 Series, 300V Medium Duty, 0.375" Pitch •4W U. & w 1 5 V s# fe II STRAP CLAMP TUBULAR SCREW Model Model Model Model 621 628 618-BU P628 624 625 615-BU P625

514256

Abstract: HM514256 m514256 M 514256 hitachi HM514256 514256P HM514256-10
Contextual Info: Preliminary H M 514256 S e rie s 262144-word x 4-bit CMOS Dynamic Random Access Memory The Hitachi H M 5 1 4 2 5 6 Series is a C M O S dynam ic R A M or­ ganized 262144-w ord x 4-bit. H M 5 1 4 2 5 6 has realized higher density, higher performance and various functions by em ploying

74LS11

Abstract: for IC 74LS11
Contextual Info: Jt ^ I 1 nU/HLO I I / nU / Jt I C LO I J •T rip le 3-input Positive AND Gates •T rip le 3-input Positive AND Gates with Open Collector Outputs IP IN ARRANGEMENT IC IR C U IT SC H EM A TIC O ^) H 074L S 11 • H D 7 4 L S 1 5 RECOMMENDED OPERATING CONDITIONS

A63A

Abstract: 74LSOO
Contextual Info: •Quadruple 2-input Positive AND Gates with Open Collector Outputs IP IN ARRANGEMENT ¡C IR C U IT S C H E M A T IC ^ ) •RECOM M ENDED OPERATING CONDITIONS Symbol min typ max High level output voltage Item VOH - - 5.5 Unit V Low level output current IOL

HD74LSoop

Abstract: 74LSOO
Contextual Info: •D u a l 4-input Positive NAND Gates with Open Collector Outputs •C IR C U IT S C H E M A T IC ^ ) « P IN ARRANGEMENT ■RECOMMENDED OPERATING CONDITIONS Item High level output voltage Low leve) output current Symbol min - VoH ÌO L ■ELECTRICAL CHARACTERISTICS (

D74LS

Abstract: D74LS08
Contextual Info: H D 74LS 08 •Quadruple 2-input Positive AND Gates •PIN ARRANGEMENT ¡CIRCUIT S C H E M A T IC ^ ■ELECTRICAL CHARACTERISTICS T a = - 2 0 ~ +75"C ) Item Input voltage Symbol Test Conditions min - V lL - - 0 .8 V 2.7 - - V - - 0.5 - - - - V cc = 4.75V ,

74LSOO

Abstract: Hitachi Scans-001
Contextual Info: HD74LS10. Triple 3-¡nput Positive N AND Gates •PIN ARRANGEMENT IC IR C U IT SC H EM A TIC V3 ■ELECTRICAL CHARACTERISTICS ( Ta= - 20- + 75’C ) Item Symbol T est Conditions min 2.0 V iH Input voltage V lL Van Output voltage VO L S h o rt-c irc u it output c u rren t

HM51258-15

Abstract: HM51258-10 AX402 DP-16B
Contextual Info: HMS12S8 Series 262144-word x 1-bit Static Column CMOS Dynamic RAM The H M 5 1 2 5 8 is the 262,144 word by 1 bit static colum n dynam ic random access memory utilizing the Hitachi 2pm C M O S process. This device has static colum n circuit and it is good for

74LSOO

Abstract: HD74LSoop
Contextual Info: •Quadruple 2-input Positive NAND Buffers with Open Collector Outputs •C IR C U IT S C H E M A T IC ^ ) « P IN ARRANGEMENT ■RECOMMENDED OPERATING CONDITIONS Item High level output voltage Low level output current Symbol min max 5.5 24 - VO L IO L ■ELECTRICAL CHARACTERISTICS (

74LSOO

Contextual Info: •T rip le 3-input Positive NAND Gates with Open Collector Outputs • C IR C U IT S C H E M A T IC ^ ) * P |N ARRANGEMENT ■RECOM M ENDED OPERATING CONDITIONS min typ max Unit High level output voltage VoH - - 5 .5 V Low level output cu rre n t IOL -

74LSOO

Contextual Info: •D u a l 4-input Positive NAND Gates with Open Collector Outputs •C IR C U IT S C H E M A T IC ^ ) « P IN ARRANGEMENT ■RECOMMENDED OPERATING CONDITIONS Symbol min typ max High level output voltage Item VoH - - 5 .5 Low leve) output cu rre n t ÌOL

74LSOOP

Contextual Info: HD74LS20. Dual 4-¡nput Positive NANO Gates ¡C IR C U IT S C H E M A T IC ^ IP IN ARRANGEMENT •ELECTRICAL CHARACTERISTICS ( T a = - 2 0 - +75‘C ) Item Symbol T e s t Conditions typ* 2 .0 - - VlL - - 0 .8 V 2 .7 - - V - - 0 .5 0 .4 Input voltage VoH

HD74LSoop

Abstract: 74LSOO 74LSOOP HD74LSOO GG14T13
Contextual Info: •Quadruple 2-input Positive NAND Gates • C IR C U IT S C H E M A T IC ^ » P 'N ARRANGEMENT ■ELECTRICAL CHARACTERISTICS ( T a = - 2 0 - +75°C ) Item Symbol T e s t Conditions min typ* max Unit VlH 2 .0 - - V V lL - - 0 .8 V V Input voltage VoH Vcc =

Contextual Info: H D 7 4 A C 1 1 •T rip le 3-Input AND Gate • Outputs Source/Sink 24 mA Pin Assignment Top View DC Characteristics (unless otherwise specified) Parameter Symbol Condition Unit Max or Ground, Vcc = 5.5 V, T a = Worst Case V in = V c c Icc Maximum Quiescent

74LSOOP

Contextual Info: HD74LS1O. Triple 3-¡nput Positive N AND Gates •PIN ARRANGEMENT IC IR C U IT S C H E M A T IC ^ ■ELECTRICAL CHARACTERISTICS T a = ~ 2 0 ~ + 7 5 ° C ) Item Symb ol T e s t C ond iti on s min typ* max Unit VlH 2.0 - - V V,L - - 0.8 V V Input volta ge

74LSOOP

Abstract: HD74LSoop 74LSOO
Contextual Info: H D 74LS13. Dual 4-input Positive N AND Schmitt Triggers IP IN ARRANGEMENT IC IR C U IT SC H EM A TIC O ^ 20 75 •ELECTRICAL CHARACTERISTICS Ta= - + C) Item Symbol T e st Conditions Vt + Vcc = 5 V Input threshold voltage Vt ~ Vcc = 5V Vt +- Vt H y steresis

74LSOO

Abstract: CI 2210 HD74LSoop
Contextual Info: •T rip le 3-input Positive NOR Gates • C IR C U IT S C H E M A T IC ^ B P IN ARRANGEMENT ■ELECTRICAL CHARACTERISTICS ( Ta= - 2 0 - +75°C ) Item S ym bol T e s t C o n d itio n s min typ* m ax V lH 2 .0 - - V lL - - 0 .8 U n it Input v o lta g e V

Contextual Info: H D74A C20 •D u a l 4-Input NAND Gate • O utputs Source/Sink 24 mA Pin Assignment Top View DC Characteristics (unless otherwise specified) M ax P a r a m e te r Sym bol U n it C o n d itio n Icc M a x im u m Q u ie s c e n t S u p p ly C u rre n t 40