ILP DIRECT Search Results

Contextual Info: M lG M V O - ilP 24C01SC/02SC 1K/2K 5.0V I2C Serial EEPROMs for Smart Cards FEATURES • ISO Standard 7816 pad locations • Low power CMOS technology - 1 mA active current typical - 10 nA standby current typical at 5.5V • Organized as a single block of 128 bytes 128 x 8

RAS 0510 SUN HOLD

Abstract: sun hold RAS 0510 8255 PPI Chip 8086 PPI 8255 interface with 8086 82C100 F82C100 8255 programmable peripheral interface 7 SEGMENT DISPLAY 8255 and 8088 ic dma 8237 8088 LA 7840
Contextual Info: «sì:ik uuuui»uu: ADVANC E INFORMATION C in ilP S . 82C 100 IB M T P S /2 M odel 3 0 and S u per X T 71 C o m p atib le C hip M 100% PC/XT compatible * • Build IBM PS/2 Model 30 with XT software compatibility Key superset features: EMS control, dual

Contextual Info: BSiTOKO r e y io r a v ilP M I F D G O T M TK11950 VO LTAG E R E G U L A T O R W IT H R E S E T O U T P U T FEATURES APPLICATIONS • Very Low Dropout Voltage ■ Reset Output for Microprocessor ■ Battery Powered Systems ■ Very Low Quiescent Current No Load

intel 4004

Abstract: cpu Intel 4004 i486 intel 486 & pentium 8080 intel microprocessor intel 8080 microprocessor memory management instructions of 80286 microprocessor
Contextual Info: New Challenges in Microarchitecture and Compiler Design Fred Pollack Intel Fellow Director of Microprocessor Research Labs Intel Corporation fred.pollack@intel.com Contributors: Jesse Fang Tin-Fook Ngai 1 Moore’s Law Transistors Per Die 108 256M 106 4M 256K

fma 88

Abstract: ilp 127 Itanium 2 block Itanium 2 block diagram Pentium III Developer pentium "II Xeon" LC1 ec
Contextual Info: Itanium Architecture Overview Gautam Doshi Senior Architect Enterprise Processor Division November 30, 2000 Itanium™ Itanium™ Developer Conference - Nov 30, 2000, Amsterdam - Itanium™ Itanium™ Architecture Overview 1 (1 Agenda ! Today’s Architecture Challenges

C266

Abstract: P15 Package 27C64 CY7C266 R1250 8kx8 eprom pin diagram
Contextual Info: ,.V.Ï .Ï .V.^ y nr' Æ CY7C266 CYPRESS 8Kx8 Power-Switched and Reprogrammable PROM Functional Description Features • CMOS fo r optimum speed/power • Windowed for reprogramm ability • High speed The CY7C266 is a high-performance 8192 word by 8 bit CMOS PROM. When deselected, the CY7C266 automatically

Contextual Info: CY7C266 CYPRESS 8Kx8 Power-Switched and Reprogrammable PROM Features Functional Description • CMOS for optimum speed/power The CY7C266 is a high-performance 8192 word by 8 bit CMOS PROM. When deselected, the CY7C266 automatically powers down into a low-power standby mode. It is packaged

qml-38535

Abstract: CQCC1-N20 TLV5618AM E49-1
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET 15 REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY RICK OFFICER STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

QML-38535

Abstract: DS26LV31 GDFP2-F16 smd zm diode
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET REV STATUS REV OF SHEETS SHEET PM IC N/A PREPARED BY 1 2 3 4 5 6 7 8 9 10 11 12 Dan W onnell STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 CHECKED BY

PLS105

Contextual Info: COM’L a PLS105-40, PLSCE105H-37 Advanced Micro Devices 28-Pin TTL/CMOS Programmable Logic Sequencer DISTINCTIVE CHARACTERISTICS • Field-programmable replacement for sequential control logic User-programmable pin for asynchronous flip-flop Preset/Output Enable

AS5C2008

Abstract: QML-38534 WS256K8-100CQ WS256K8-120CQ WS256K8-45CQ WS256K8-55CQ WS256K8-70CQ WS256K8-85CQ 55cq WS256K8-70CQA
Contextual Info: REVISIO N S LTR D E S C R IP TIO N DATE YR-mo -da APPRO VED D Table I; C hanged the max limit for lcc for device types 06 throu gh 09 98-06 -22 K.A. C ottongim from 150 m A to 180 mA. C hanged the m ax limit for lCCDR for device _ types 06 throu gh 09 from 6.4 m A to 7.0 mA. -

QML-38535

Abstract: HS1100 HFA1100
Contextual Info: R E V IS IO N S LTR DATE YR-MO-DA APPROVED Make change to TABLE I in accordance with N.O.R. 5962-R012-95. DESCRIPTION 94-10-28 M.A. Frye Add device type 02. Change boilerplate to radiation hardened format. Make changes to 1.2, 1.2.2, 1.4, TABLE I, Figure 1, and Figure 4.

7C261

Abstract: 7C261-25 C2612 CY7C263-45DC C2613 J-64 CY7C263-35DMB CY7C261 DIODE SMD W12 75 C261
Contextual Info: CYPRESS SEMIC ON DUC TOR MbE D BSfl^bbS □□Qb704 1 n C Y P CY7C261 CY7C263/CY7C264 CYPRESS SEMICONDUCTOR Features 8192 x 8 Power-Switched and Reprogrammable PROM • TTL-compatible I/O • Direct replacement for bipolar PROMs • CMOS for optimum speed/power

Contextual Info: fax id: 3016 CYPRESS PRELIMINARY CY7C271A 32K x 8 Power Switched and Reprogrammable matically powers down into a low-power stand-by mode. The CY7C271A is packaged in the 300-mil slim package and is available in a cerDIP package equipped with an erasure w in­

Contextual Info: CY7C266 8Kx8 Power-Switched and Reprogrammable PROM Features Functional Description • CMOS for optimum speed/power • Windowed for reprogramm ability • High speed The CY7C266 is a high-performance 8192 word by 8 bit CMOS PROM. When deselected, the CY7C266 automatically

Contextual Info: ADV MICRO PLA/PLE/ARRAYS c o m 2ÖE D fl 055752b 002^742 2 • AMD2 -l PLS167-33, PLSCE167H-33 PLS168-33, PLSCE168H-33 ' ^ Advanœd mero Devices 24-Pin TTL/CMOS Programmable Logic Sequencers DISTINCTIVE CHARACTERISTICS ■ ■ Field-programm able replacement for

Contextual Info: COM’L PLS167-33, PLSCE167H-33 PLS168-33, PLSCE168H-33 Advanced Micro Devices 24-Pin TTL/CMOS Programmable Logic Sequencers DISTINCTIVE CHARACTERISTICS • ■ Field-programmable replacement for sequential control logic User-programmable pin for asynchronous

tm-1017

Abstract: TM1017 UT63M125BB 5962-8864401UA qml-38535 UT63M125BBC UT63M125CBC UT63M125BBA UT63M107 UT63M125
Contextual Info: REVISIONS LTR DATE YR-MO-DA DESCRIPTION Changes in accordance with NOR 5962-R119-93 Changes in accordance with NOR 5962-R122-94 Add device class level V. Update boilerplate APPROVED M. L. Poelking M. L. Poelking M. L. Poelking 93-04-12 94-03-03 97-06-06

smd diode marking LOB

Abstract: qml-38535 54ACT399 CQCC1-N20 GDFP2-F16 GDIP1-T16 54ACT399DMQB
Contextual Info: REVISIONS LTR DESCRIPTION Add RHA criteria and limits. Editorial changes throughout - jak. DATE YR-MO-DA APPRO VED 99-05-06 M onica L. Poelking REV SHEET REV SHEET A A A 15 16 17 REV STATUS O F SHEETS PMIC N/A REV SHEET A A A A A A A A A A A A A A 1 2 3

Contextual Info: COM’L: -15/20 MIL: -20 M A C H 1 1 0 - 1 5 /2 0 High-Density EE CMOS Programmable Logic a Advanced Micro Devices DISTINCTIVE CHARACTERISTICS • 44 Pins 38 Inputs ■ 32 Macrocells 32 Outputs ■ 15 ns tpo Commercial 20 ns fpD Military 32 Flip-Flops ■

QML-38535

Abstract: LT1024A
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET REV STATUS REV OF SHEETS SHEET PMIC N/A PREPARED BY RICK OFFICER STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE

qml-38535

Abstract: GDIP4-T28 P4C1982-35CMB 16KX4 GDFP2-F28
Contextual Info: REVISIONS LTR D E S C R IP TIO N DATE YR-MO-DA Updated boilerplate. Added C A G E 7 5 5 9 6 as a source of supply. - gig APPROVED 99 -0 5 -0 4 Raymond Monnin REV SHEET REV SHEET REV STATUS OF SHEETS REV SHEET PM IC N/A STANDARD MICROCIRCUIT DRAWING THIS DRAW ING IS AVAILABLE

5962-98651

Abstract: QML-38535 DS90LV031A GDFP2-F16 990526
Contextual Info: REVISIONS LTR DESCRIPTION DATE YR-MO-DA APPROVED REV SHEET REV SHEET REV STATUS REV 1 OF SHEETS SHEET PMIC N/A PREPARED BY 2 3 4 5 6 8 7 9 10 11 Dan Wonnell STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216 CHECKED BY Raymond Monnin

Contextual Info: Preliminary COM’L Cl PAL24R10-10 Series Advanced Micro Devices 10 ns 28-pin TTL Programmable Array Logic DISTINCTIVE CHARACTERISTICS Power-up reset for initialization • 10 ns maximum propagation delay ■ f MA x ■ 8 ns maximum from clock input to data output