IDT74LVCH Search Results

LVCH16541A

Abstract: IDT74LVCH16541A
Contextual Info: IDT74LVCH16541A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT BUFFER/ DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION FEATURES: – – – – – – – – – IDT74LVCH16541A

LVCH16540A

Abstract: LVCH16540
Contextual Info: IDT74LVCH16540A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS EXTENDED COMMERCIAL TEMPERATURE RANGE IDT74LVCH16540A 3.3V CMOS16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – –

IDT74LVCH16701A

Abstract: LVCH16701A SO56-2 701A
Contextual Info: IDT74LVCH16701A 3.3V CMOS 18-BIT READ/WRITE BUFFER, 5 VOLT I/O EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 18-BIT READ/WRITE BUFFER WITH 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: IDT74LVCH16701A DESCRIPTION: – – Typical tSK 0 (Output Skew) < 250ps

LVCH373A

Contextual Info: IDT74LVCH373A 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: – – – – – – – – – – IDT74LVCH373A

Contextual Info: IDT74LVCH16240A 3.3V CMOS 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: - designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can

Contextual Info: IDT74LVCH32373A 3.3V CMOS 32-BIT ADVANCE TRANSPARENT D-TYPE LATCH INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical tS K o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: 3.3V CMOS ONE-TO-FOUR ADDRESS/CLOCK DRIVER WITH BUS HOLD, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - IDT74LVCH16344A ADVANCE INFORMATION The LVCH16344A is a 1 :4 address line driver built using advanced dual metal C M O S technology. This high speed, low power device provides the ability to fanout to memory

Contextual Info: IDT74LVCH162543A 3.3V CMOS 16-BIT ADVANCE REGISTERED TRANSCEIVER INFORMATION WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD flow. The A-to-B enable CEAB must be low in order to enter data from A or to output data from B. If CEAB is low and LEAB is low, the A-to-B latches are transparent; a subsequent lowto-high transition of LEAB puts the A latches in the storage

Contextual Info: 3.3V CMOS 16-BIT IDT74LVCH16373A TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: - Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) 0.635mm pitch SSOP, 0.50mm pitch TSSOP

Contextual Info: IDT74LVCHR162245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - Typical tsK o (Output Skew) < 250ps ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)

Contextual Info: IDT74LVCH2541A 3.3V CMOS ADVANCE INFORMATION OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0

Contextual Info: life 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTERS WITH 5 VOLT TOLERANT I/O IDT74LVCH16646A ADVANCE INFORMATION Integrated Device Technology, Inc. FEATURES: using advanced dual metal CMOS technology. These high­ speed, low power devices are organized as two independent

Contextual Info: 3.3V CMOS OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS AND BUS-HOLD FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 - IDT74LVCH646A ADVANCE INFORMATION B bus is clocked into the registers on the low-to-high transition of the

IDT74LVCH16373A

Abstract: LVCH16373A
Contextual Info: Integrated Device Technology, Inc. 3.3V CMOS 16-BIT TRANSPARENT LATCH WITH BUS HOLD AND 5 VOLT TOLERANT I/O IDT74LVCH16373A ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: – Typical tSK o (Output Skew) < 250ps – ESD > 2000V per MIL-STD-883, Method 3015;

lvc1622

Abstract: LVC16244A IDT74LVCH162244A IDT74LVCH16244A LVC162244A LVCH162244A LVCH16244A IDT74LVC162244A IDT74LVC16244A lvc16244
Contextual Info: 3.3V CMOS 16-BIT BUFFER/LINE DRIVER WITH 5 VOLT TOLERANT I/O Integrated Device Technology, Inc. IDT74LVCH16244A IDT74LVCH162244A IDT74LVC16244A IDT74LVC162244A ADVANCE INFORMATION FEATURES: DESCRIPTION: • Common features: – Typical tSK o (Output Skew) < 250ps

IDT74LVCH16276A

Abstract: LVCH16276A SO56-2 sel 4230
Contextual Info: IDT74LVCH16276A 3.3V CMOS 12-BIT ADVANCE INFORMATION SYNCHRONOUS BUS EXCHANGER WITH BUS HOLD AND 5 VOLT TOLERANT I/O Integrated Device Technology, Inc. plexers for use in synchronous memory interleaving applications. All registers have a common clock and use a

4236

Abstract: 4236 8 pin ic BA-4236 l IDT74LVCH16543A LVCH16543A BA4236 ba 4236 l
Contextual Info: 3.3V CMOS 16-BIT LATCHED TRANSCEIVER WITH 5 VOLT TOLERANT I/O IDT74LVCH16543A ADVANCE INFORMATION Integrated Device Technology, Inc. speed, low-power devices are organized as two independent 8-bit D-type latched transceivers with separate input and output control to permit independent control of data flow in either

IDT74LVCH573A

Abstract: LVCH573A
Contextual Info: IDT74LVCH573A 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: IDT74LVCH573A ADVANCE INFORMATION signed specifically for driving highly capacitive or relatively low-impedance

sel 4230

Contextual Info: IDT74LVCH16276A 3.3V CMOS 12-BIT SYNCHRONOUS BUS EXCHANGER INDUSTRIAL TEMPERATURE RANGE IDT74LVCH16276A 3.3V CMOS 12-BIT SYNCHRONOUS BUS EXCHANGER WITH BUS-HOLD AND 5 VOLT TOLERANT I/O FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps • ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

Contextual Info: IDT74LVCHR162245A 3.3V CMOS 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS INDUSTRIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT IDT74LVCHR162245A BUS TRANSCEIVER WITH 3 STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: This 16-bit bus transceiver is built using advanced dual metal CMOS

Contextual Info: IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER INDUSTRIAL TEMPERATURE RANGE IDT74LVCH16646A 3.3V CMOS 16-BIT BUS TRANSCEIVER/REGISTER WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps

IDT74LVCH32501A

Abstract: LVCH32501A
Contextual Info: IDT74LVCH32501A ADVANCE INFORMATION 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER, 5 VOLT TOLERANT I/O, BUS-HOLD Integrated Device Technology, Inc. DESCRIPTION: FEATURES: This 36-bit registered transceiver is built using advanced dual metal CMOS technology. This device combines D-type

IDT74LVCH162373A

Abstract: LVCH162373A
Contextual Info: IDT74LVCH162373A 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS 16-BIT TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O, BUS-HOLD FEATURES: – – – – – – – – – IDT74LVCH162373A DESCRIPTION:

IDT74LVCH32374A

Abstract: LVCH32374A
Contextual Info: IDT74LVCH32374A 3.3V CMOS 32-BIT ADVANCE EDGE TRIGGERED D-TYPE INFORMATION FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD Integrated Device Technology, Inc. FEATURES: DESCRIPTION: – Typical tSK o (Output Skew) < 250ps – ESD > 2000V per MIL-STD-883, Method 3015;