LVCH32501A Search Results
LVCH32501A Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
IDT74LVCH32501A
Abstract: LVCH32501A
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Original |
IDT74LVCH32501A 36-BIT 36-bit 32-bit IDT74LVCH32501A LVCH32501A | |
IDT74LVCH32501A
Abstract: LVCH32501A
|
Original |
IDT74LVCH32501A 36-BIT 36-BIT 250ps MIL-STD-883, 200pF, 32-bit IDT74LVCH32501A LVCH32501A | |
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Contextual Info: 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: - This 3 6-bit registered tran sceive r is built using advanced dual m etal C M O S technology. This device com bines D-type latches and D -type flip-flops to allow d ata flow in transparent, |
OCR Scan |
36-BIT 250ps 200pF, IDT74LVCH32501A | |
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Contextual Info: LVCH32501A 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER WITH 5V TOLERANT I/O INDUSTRIAL TEMPERATURE RANGE LVCH32501A 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER WITH 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps |
Original |
IDT74LVCH32501A 36-BIT 36-BIT 250ps MIL-STD-883, 200pF, 114-ball | |
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Contextual Info: 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER, 5 VOLT TOLERANT I/O, BUS-HOLD DESCRIPTION: FEATURES: - This 36-bit registered transceiver is built using advanced dual metal CMOS technology. This device combines D-type latches and D-type flip-flops to allow data flow in transparent, |
OCR Scan |
36-BIT 250ps MIL-STD-883, 200pF, IDT74LVCH32501A | |
|
Contextual Info: LVCH32501A 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER WITH 5V TOLERANT I/O INDUSTRIAL TEMPERATURE RANGE LVCH32501A 3.3V CMOS 36-BIT REGISTERED TRANSCEIVER WITH 5 VOLT TOLERANT I/O AND BUS-HOLD FEATURES: DESCRIPTION: • Typical tSK o (Output Skew) < 250ps |
Original |
IDT74LVCH32501A 36-BIT 250ps MIL-STD-883, 200pF, 114-ball IDT74LVCH32501A |