IDT74LVC533A Search Results
IDT74LVC533A Datasheets (4)
| Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
|---|---|---|---|---|---|---|---|
| IDT74LVC533APG | Integrated Device Technology | 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O | Original | 110.93KB | 6 | ||
| IDT74LVC533APY | Integrated Device Technology | 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O | Original | 110.93KB | 6 | ||
| IDT74LVC533AQ | Integrated Device Technology | 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O | Original | 110.93KB | 6 | ||
| IDT74LVC533ASO | Integrated Device Technology | 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O | Original | 110.93KB | 6 |
IDT74LVC533A Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
|
Contextual Info: 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O IDT74LVC533A ADVANCE INFORMATION D E S C R IP TIO N : FEATURES: - 0.5 MICRON CMOS Technology - ESD > 2000V per MIL-STD-883, Method 3015; The LVC533A octal transparent D-type latch is built using advanced dual |
OCR Scan |
MIL-STD-883, 200pF, 635mm IDT74LVC533A LVC533A | |
LVC533AContextual Info: IDT74LVC533A 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH EXTENDED COMMERCIAL TEMPERATURE RANGE 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS AND 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: – – – – – – – – – – IDT74LVC533A ADVANCE |
Original |
IDT74LVC533A MIL-STD-883, 200pF, 635mm LVC533A | |
|
Contextual Info: 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 1,27mm pitch SOIC, 0.65mm pitch SSOP, |
OCR Scan |
MIL-STD-883, 200pF, 635mm LVC533A IDT74LVC533A | |
|
Contextual Info: 3.3V CMOS OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O DESCRIPTION: FEATURES: - 0.5 MICRON CMOS Technology ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model C = 200pF, R = 0 1.27mm pitch SOIC, 0.65mm pitch SSOP, |
OCR Scan |
MIL-STD-883, 200pF, 635mm IDT74LVC533A LVC533A |