IDT74LVC32374A Search Results

IDT74LVCH32374A

Abstract: LVCH32374A
Contextual Info: IDT74LVCH32374A 3.3V CMOS 32-BIT ADVANCE EDGE TRIGGERED D-TYPE INFORMATION FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD Integrated Device Technology, Inc. FEATURES: DESCRIPTION: – Typical tSK o (Output Skew) < 250ps – ESD > 2000V per MIL-STD-883, Method 3015;

Contextual Info: 3.3V CMOS 32-BIT IDT74LVCH32374A EDGE TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, INFORMATION 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH32374A 32-bit edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. This high­

Contextual Info: IDT74LVCH32374A 3.3V CMOS 32-BIT ADVANCE EDGE TRIGGERED D-TYPE INFORMATION FLIP-FLOP WITH 3-STATE OUTPUTS, 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: The LVCH32374A 32-bit edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. This high­

Contextual Info: 3.3V CMOS 32-BIT IDT74LVCH32374A EDGE TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, INF0RMATI0N 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH32374A 32-bit edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. This high­

Contextual Info: 3.3V CMOS 32-BIT IDT74LVCH32374A EDGE TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, INF0RMATI0N 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH32374A 32-bit edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. This high­

Contextual Info: 3.3V CMOS 32-BIT IDT74LVCH32374A EDGE TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS, INFORMATION 5 VOLT TOLERANT I/O AND BUS-HOLD DESCRIPTION: FEATURES: - The LVCH32374A 32-bit edge-triggered D-type flip-flop is built using advanced dual metal CMOS technology. This high­