HEF40192BD Search Results

The IC04 LOCMOS HE4000B Logic

Abstract: MR 6500 6500 CPU decade counter circuit diagram hef package outlines information IC04 LOCMOS HE4000B Logic IC04 LOCMOS HE4000B Logic Family Specification HE4000B HEF40192B HEF40192BD
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40192B MSI 4-bit up/down decade counter

MR 6500

Abstract: HEF40192B HEF40192BD HEF40192BP HEF40192BT
Contextual Info: HEF40192B MSI _ y 4-BIT UP/DOWN DECADE COUNTER The HEF40192B is a 4-bit synchronous up/down decade counter. The counter has a count-up clock input CPu , a count-down clock input (CPq), an asynchronous parallel load in pu t (P L ),fo u r parallel

BPW22A

Abstract: cm .02m z5u 1kv pin configuration of BFW10 la4347 B2X84 TDA3653 equivalent TRIAC TAG 9322 HEF40106BP equivalent fx4054 core dsq8
Contextual Info: Contents Page Page New product index Combined index and status codes viii x Mullard approved components BS9000, CECC, and D3007 lists CV list Integrated circuits Section index xliii 1 5 Standard functions LOGIC FAMILIES CMOS HE4000B family specifications CMOS HE4000B family survey

hef4071bp

Abstract: HEC4051B HEF4752 octal Bilateral Switches 12 bit universal shift register HEF4534BP HEF4059BP 7-stage frequency divider HEF40374BD HEF4017BT
Contextual Info: J^ NUMERICAL INDEX extended type no. description page HEC4001BDB HEC40 feBDB HEC4007UBDB HEC40097BDB HEC40098BDB Quadruple 2-input NOR gate Dual 4-input NOR gate Dual complementary pair and inverter 3-state hex non-inverting buffer 3-state hex inverting buffer

MR 6500

Contextual Info: HEF40192B MSI 4-BIT UP/DOWN DECADE COUNTER The H E F 4ftl92B is a 4-b it synchronous up/down decade counter. The counter has a count-up clock input CPy , a count-down clock input (CPq), an asynchronous parallel load input (PL), fou r parallel data inputs (Pg to P3 ), an asynchronous master reset input (MR), fo u r counter outputs (Oo to O3 ), an

HE4000B

Abstract: HEF40192B HEF40192BD HEF40192BP HEF40192BT MS-012AC
Contextual Info: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40192B MSI 4-bit up/down decade counter

Contextual Info: HEF40192B MSI 4-BIT UP/DOWN DECADE COUNTER The HEF40192B is a 4-bit synchronous up/down decade counter. The counter has a count-up clock input C Py , a count-down clock input (CPq), an asynchronous parallel load input (PL), four parallel data inputs (Pq to P3 ), an asynchronous master reset input (M R ), four counter outputs (Oo to 0 3 ), an

40175BD

Abstract: 4017BD 4013BD 4093bd 40194BD 4049BD HEC4556BDB 4066BD EF4104BP 4539bd
Contextual Info: ^ NUMERICAL INDEX extended type no. description page HEC4001 BDB HEC 4002BD B HEC 4007U BDB H EC 40097BD B H EC 40098BD B Q uadruple 2-input NOR gate Dual 4-input NOR gate Dual com plem entary pair and inverter 3-state hex non-inverting buffer 3-state hex inverting buffer