HD74AC Search Results

Contextual Info: HM66205 S e rie s-524,288-Word x 8-Bit High Density CM O S Static RAM Module • PIN ARRANGEMENT Description The HM66205 is a high density 4M-bit static RAM module consisting of 4 pieces HM628128LTS products TSOP type 1M static RAM and a HD74ACT138FP equivalent product (SOP

Contextual Info: HD74AC138/HD74ACT138 Description • 1 - o f- 8 Decoder/Demultiplexer Pin Assignment The HD74AC138/HD74ACT138 is a high-speed l-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The multiple input enables allow

Contextual Info: H D 74A C 253/H D 74A C T 253* Description The HD74ACa53/HD74ACT253 is a dual 4-input multiplexer with 3-state outputs. It can select two bits of data from four sources using common select inputs. The outputs may be individually switched to a high impedance state with a High on the

Zo transistor h07

Contextual Info: H D 74A C 14/H D 74A C T14 • H e x Inverter Schmitt Trigger Description The HD74AC14/HD74ACT14 contains six logic in­ verters which accept standard CMOS input signals TTL levels for HD74ACT14 and provide standard CMOS output levels. They are capable of trans­

Hitachi DSA0095

Abstract: DP-14 FP-14DA FP-14DN HD74AC74 TTP-14D
Contextual Info: HD74AC74 Dual D-Type Positive Edge-Triggered Flip-Flop ADE-205-361 Z 1st. Edition Sep. 2000 Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse.

DP-14

Abstract: FP-14DA FP-14DN HD74AC86 HD74ACT86 TTP-14D Hitachi DSA003769
Contextual Info: HD74AC86/HD74ACT86 Quad 2-Input Exclusive-OR-Gate Features • Outputs Source/Sink 24 mA • HD74ACT86 has TTL-Compatible Inputs Pin Arrangement 1 14 VCC 2 13 3 12 4 11 5 10 6 9 GND 7 8 Top view DC Characteristics (unless otherwise specified) Item Symbol

HD74AC139

Abstract: HD74ACT139 Hitachi DSA00348
Contextual Info: HD74AC139/HD74ACT139 Dual 1-of-4 Decoder/Demultiplexer Description The HD74AC139/HD74ACT139 is a high-speed, dual 1-of-4 decoder/demultiplexer. The device has two independent decoders, each accepting two inputs and providing four mutually-exclusive active-Low

Contextual Info: HD74AC158/HD74ACT158 D escription • Quad 2-Input Multiplexer Pin Assignment The H D 74A C 158/H D 74A C T158 is a high-speed quad 2-input m ultiplexer. It selects four bits of data from tw o sources using th e com m on Select and Enable inputs. T he four buffered o u tp u ts present

ow C541

Abstract: C541
Contextual Info: H D74AC540/H D74ACT540 HD74AC541 /HD74ACT541 •ffiSffi'.Ä?'"' Description The H D 74A C540/H D 74A CT540 and H D 74A C541/ H D 74ACT541 are octal buffer/line drivers designed to be em ployed as memory and address drivers, clock drivers and bus oriented transmitter/receivers.

004II

Contextual Info: H D 7 4 A C 1 0 9 / H D 7 4 A C T 1 0 9 *r;“ho„Po’ ”Ed°”T,s»«*d Description The HD74AC109/HD74ACT109 consists of two high­ speed completely independent transition clocked JK flipflops. The clocking operaiton is independent of rise and fall times of the clock waveform. The JK design allows

Contextual Info: HD74AC00/HD74ACT00 • Quad 2-Input NAND Gate >O u tp u ts Source/Sink 24 mA >H D 74A CT00 has TTL-C om patible Inputs Pin Assignment g n d T (T op View DC Characteristics (unless otherwise specified) P a r a m e te r Sym bol Ice Icc M ax M a x im u m Q u ie s c e n t

HD74ACT670

Abstract: PD245
Contextual Info: H D 7 4 A C 6 7 0 /H D 7 4 A C T 6 7 0 *i£i S S « Description Pin Assignment The HD74AC670/HD74ACT670 contains 16 high speed, low power, transparent D-type latches arranged as four words o f four bits each, to function as a 4 x 4 register file. Separate read and write

74AC194

Contextual Info: HD74AC194/HD74ACT194 Description Pin Assignment T h is b id ire ctio n al shift register is designed to in co rp o ra te v irtu a lly all o f th e features a system designer m ay w ant in a shift register. It features p a ralle l inputs, p a ralle l outputs,

74AC181

Abstract: 74ACT181 004II 225si HD74AC181
Contextual Info: HD74AC181/HD74ACT181 Description Pin Assignment I-1-S ./ The H D 74A C 181/H D 74A C T181 is a 4-bit A rith­ m etic logic U nit ALU w hich can perform all the possible 16 logic operations on tw o variables and a variety o f arithm etic operations. • O u tputs Source/Sink 24 mA

Hitachi DSA00279

Contextual Info: HD74AC539 Dual 1-of-4 Decoder with 3-State Output Description The HD74AC539 contains two inpedendent decoders. Each accepts two Address A 0, A1 input signals and decodes them to select one of four mutually exclusive outputs. A polarity control input (P)

Hitachi DSA00279

Contextual Info: HD74AC08 Quad 2-Input AND Gate Feature • Outputs Source/Sink 24 mA Pin Arrangement DC Characteristics unless otherwise specified Item Symbol Max Unit Condition Maximum quiescent supply current I CC 40 µA VIN = VCC or ground, VCC = 5.5 V, Ta = Worst case

Hitachi DSA00279

Contextual Info: HD74AC393 Dual Modulo-16-Counter Description The HD74AC393 contains a pair of high speed 4-stage ripple counters. Each half of the HD74AC393 operates as a modulo-16 binary divider, with the last three stages triggered in a ripple fashion. The flip-flops are triggered by a High-to-Low transition of their CP inputs. Each half of each circuit type

Hitachi DSA00279

Contextual Info: HD74AC670 4 x 4 Register File with 3-State Output Description The HD74AC670 contains 16 high speed, low power, transparent D-type latches arranged as four words of four bits each, to function as a 4 × 4 register file. Separate read and write inputs, both address

Hitachi DSA00279

Contextual Info: HD74AC259 8-bit Addressable Latch Description The HD74AC259 is a high-speed 8-bit addressable latch designed for general purpose storage applications in digital systems. It is a multifunctional device capable or storing single line data in eight addressable latches, and also a 1-of-8 decoder and demultiplexer with active HIGH outputs. The

HD74AC86

Abstract: HD74AC86FPEL HD74AC86RPEL HD74ACT86
Contextual Info: HD74AC86/HD74ACT86 Quad 2-Input Exclusive-OR-Gate REJ03D0278–0200Z Previous ADE-205-362 (Z Rev.2.00 Jul.16.2004 Features • Outputs Source/Sink 24 mA • HD74ACT86 has TTL-Compatible Inputs • Ordering Information: Ex. HD74AC86 Part Name Package Type

HD74AC74TELL

Abstract: HD74AC74 HD74AC74FPEL HD74AC74P HD74AC74RPEL
Contextual Info: HD74AC74 Dual D-Type Positive Edge-Triggered Flip-Flop REJ03D0277–0200Z Previous ADE-205-361 (Z Rev.2.00 Jul.16.2004 Description The HD74AC74 is a dual D-type flip-flop with Asynchronous Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is transferred to the outputs on the positive edge of the clock pulse. Clock triggering occurs at a

HD74AC157

Abstract: Hitachi DSA00335
Contextual Info: HD74AC157 Quad 2-Input Multiplexer Description The HD74AC157 is a high-speed quad 2-input multiplexer. Four bits of data from two sources can be selected using the common Select and Enable inputs. The four outputs present the selected data in the true noninverted form. The HD74AC157 can also be used as a function generator.

HD74AC32P

Abstract: DP-14 HD74AC32 HD74AC32FPEL HD74AC32RPEL HD74AC32TELL
Contextual Info: HD74AC32 Quad 2-Input OR Gate REJ03D0268–0200Z Previous ADE-205-360 (Z Rev.2.00 Jul.16.2004 Features • Outputs Source/Sink 24 mA • Ordering Information Part Name Package Type Package Code Package Abbreviation Taping Abbreviation (Quantity) HD74AC32P

HD74AC181

Abstract: HD74AC182 HD74AC381
Contextual Info: HD74AC182 Carry Lookahead Generator REJ03D0258–0200Z Previous ADE-205-378 (Z Rev.2.00 Jul.16.2004 Description The HD74AC182 is a high-speed carry lookahead generator. It is generally used with the HD74AC181 or HD74AC381 4-bit arithmetic logic unit to provide high-speed lookahead over word lengths of more than four bits.