HD100K Search Results

HD100K

Contextual Info: GENERAL INFORMATION OF HD100K SERIES •FEATURES cation of inverters, and it avoids the problems of number of external parts, power dissipation, pro­ • Stability Built-in temperature and voltage compensation cir­ cuits assure the stable output characteristics within

Contextual Info: H D 100125 Hex ECL-to-TTL Translators The HD100125 is a Hex Translator for converting outputs, which will go low when the inputs are left HD100K logic levels to T T L logic levels. Differen­ tial inputs allow each circuits to be used as an inverting, non-inverting or as a differential re­

Contextual Info: COMMON DC CHARACTERISTICS OF HD100K SERIES B V e e = — 4.5V , V cc = V cca = G N D , 7 a = 0 t o Item Symbol + 85°C T e st Condition Voi, O utput V oltage V i s = V ih « i or Vis' = V u . mi* Vol. Vt t = —2.0V A .= 5 o n VoHC O utput T hreshold V oltage

L1340

Contextual Info: H D 10012S Hex E C L -to -T T L T ranslators The H D 100125 is a Hex Translator for converting HD100K logic levels to T T L logic levels. Differen­ outputs, which will go low when the inputs are left unconnected, have a fan-out of 10 Schottky T T L loads. When used in the differential mode, the

HD10131

Abstract: HD10125 HD10231 HD10116 HD100112 HD10K HD10130 HM10474
Contextual Info: CONTENTS • G E N E R A L I N F O R M A T I O N . 4 • Definition of Letter Symbols and Abbreviations.

HD100K

Contextual Info: HM100415.HM100415CG 1 0 2 4 - w o r d x 1-bit Fully Decoded Random A c c e s s Memory The HM 100415 is a 1024-word x 1-bit, read/write random access memory developed for application to scratch pads, control and buffer storages which require very high speeds.

F100470

Abstract: HD100K
Contextual Info: HM100470 4 0 9 6 -w o rd x 1-bit Fully Decoded Random Access Memory The HM 100470 is a 4096-words x 1-bit, read/write, random access memory developed for high speed systems such as scratch pads and control buffer storages. The fabrication process is the Hitachi's low capacitance, oxide

Contextual Info: HM100474.HM100474F 1024-w o rd x 4 -b it Fully Decoded Random Access Memory The HM100474 is a 1024-words x 4-bit, read/write, random access memory developed for high speed systems such as scratch pads and control/buffer storages. HM100474 The fabrication process is the Hitachi’s low capacitance, oxide

HA 12058

Abstract: HA12047 HA12038 ha12058 17812P HA 12046 HA12026 HA12045 17815P 17808P
Contextual Info: HITACHI QUICK REFERENCE GUIDE TO INTEGRATED CIRCUITS AND DISCRETE SEMICONDDCTOR DEVICES PREFERRED EUROPEAN TYPE-SELECTION P.O. Box 56310, Pinegowrie 2123 nn i ^ fïü n n UDüü E B E « EBE HMffll M K MI §03* M H M B I1 2 1 » PREFERRED EUROPEAN TYPE-SELECTION

HD10K

Contextual Info: GENERAL INFORMATION In accordance with the present market needs, the computer systems badly require much faster func­ tions to the logic IC's. There are two types of the standard high-speed logic IC's widely used in the market. They are Schottky T TL's and unsaturated