H PARAMETER Search Results

S9301

Abstract: S-9301 74195 pin configuration 74195 pin diagram N9300B HA2E 74195 function table N9301
Contextual Info: SPEED/PACKAQE AVAILABILITY 54LS F,W FUNCTION TABLE PIN CONFIGURATION EACH GATE 74LS A INPUTS A B L L H H L H L H OUTPUT L H H L H = high level L = low level SWITCHING CHARACTERISTICS PARAMETER* *PLH *PHL 'PLH *PHL FROM (INPUT) Vc c = 5V, TA = 25"C LIMITS

Contextual Info: 154 4-202 154 TRUTH TABLE INPUTS OUTPUTS Eo E1 Ao A1 A2 A3 Oo O1 O2 03 04 Os Oe O7 Oa Og O 10 O 11 012 013 014 O 15 H H L L H L H L X X X L X X X L X X X L X X X L H H H L H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H H

Contextual Info: SPEED /PACK AG E AVAILABILITY 54 F,W 54LS F,W 54S F,W 74 74LS 74S PIN CONFIGURATION A,F A,F A,F FUNCTION TA BLE INPUTS OUTPUT A B Y L L H H L H L H L H H L H - high level. L = low level SWITCHING CHARACTERISTICS VC C = 5V, TA = 25°C T E S T CONDITIONS PARAMETER

1N3064

Abstract: 1N916 54LS 74LS
Contextual Info: TRUTH TABLE OUTPUT INPUT WHEN CO =H WHEN C2=L A1 B1 A2 B2 £1 2:2 C2 A3 B3 A4 B4 £3 24 C4 L H L H L H L H L H L H L H L H L L H H L L H H L L H H L L H H L L L L L H L L H H H H L L L L H H H H L L L L L L H H H H H H H H H L L H H L L H H L L H H L L L L

L-1583

Abstract: L1583
Contextual Info: Type: BL0307-50-46 _ _ — h !h • — — i _ (- h r h b !“ !" h 1- h H h 1- h h r - f- î- h K h h h H h h i- |. h •h 1 (RED h K- h h; h h H h K \ -2 (WHITE) assembled LED's: 50 x L-1583 UGC waterproof Unit: mm Tolerance: ± 0.25 Electro-optical Characteristics (DC)

ab2c

Contextual Info: PIN CONFIGURATION SPEED/PACKAGE AVAILABILITY 54 F,W 74 B,F B,F,W PACKAGE TRUTH TABLES 2-LINE TO 4-LINE DECODER SELECT B STROBE DATA 1Q 1C A 1Y0 1Y1 1Y2 H H H H L L L H H H H L H H L L H L H H H L L H H H L H H H L H H H H L X X X L H H H H 3-IZ 3-1= INPUTS

SN74LS86

Abstract: SN74LS86N SN74LS86D
Contextual Info: SN74LS86 Quad 2-Input Exclusive OR Gate VCC 14 13 12 11 10 9 http://onsemi.com 8 LOW POWER SCHOTTKY 1 2 3 4 5 6 7 GND TRUTH TABLE IN OUT A B Z L L H H L H L H L H H L 14 1 PLASTIC N SUFFIX CASE 646 GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage

41fl

Contextual Info: 41 FL M 4-Bit Full Adder The 41 FL(M) device is a bipolar, NPN, sealed junction, silicon integrated circuit. It is available in a 16-pin plastic DIP. Truth Table CO H H H L H H H H L H H L L H L L H H H L H A1 L L H H L L H L H H L H L L L L H L H H H B1

Contextual Info: Type: BL.0307-50-45 h h h h rh j- h h H H h H h hh t- h h H h r H h t— r l_ - H h I— H t- h t- !— 1 (R E D h t- h H!-h h V t- i- - 2 (W H IT E ) a s s e m b le d LE D 's: 50 x L 15 83 YC w a te rp ro o f U nit: m m T o leran ce: t 0.25 Electro-optical Characteristics (DC)

Contextual Info: Signetics 54F10, 54F11 Gates Triple Three-Input NAND ’F10 AND (’F11) Gates Product Specification Military Logic Products ORDERING INFORMATION FUNCTION TABLE A B C Y(’F10) Y(’F11) L L L L H H H H L L H H L L H H L H L H L H L H H H H H H H H L L L

ATE3

Contextual Info: FUNCTION TABLE Each Flip-Flop INPUTS OUTPUTS X X X X X X L H L H X X X X L L H H X H L H* L H H* Qo Qn H L° L H TO G G L E IO I 1 i I H IO H L L H H H H H K O L H L H H H H H J O PRESET CLEAR CLOCK H - high level {steady state) L = low level {steady state)

Contextual Info: Typical Performance H orizontal: 2 M H z /D iv H orizontal: 400 k H z /D iv Vertical: 10 d B /D iv Vertical: 1 d B /D iv Vertical: 70 nsec/Div Specifications Parameter Center Frequency Insertion Loss at 350 M H z Unit Minimum Typical Maximum MHz - 350 - dB

SN74LS86

Abstract: SN74LS86M SN74LS86N
Contextual Info: SN74LS86 Quad 2−Input Exclusive OR Gate VCC 14 13 12 11 10 9 8 http://onsemi.com LOW POWER SCHOTTKY 1 2 3 4 5 6 7 GND TRUTH TABLE IN 14 OUT A B Z L L H H L H L H L H H L 1 PLASTIC N SUFFIX CASE 646 14 1 GUARANTEED OPERATING RANGES Symbol VCC Parameter Supply Voltage

7400 series pinout diagram

Abstract: pin diagram 7400 series 7400 chip
Contextual Info: Features H H H H H H H H H H H H H H H H 18SPECint95, 16SPECfp95 @266Mhz w/1MB L2 @200Mhz 3.2 GFLOPS @ 400 MHz Peak performance Selectable bus clock (14 CPU bus dividers up to 9x) 7 selectable core to L2 frequency divisors Selectable interface voltage below 3.3 V (1.8 V, 2.5 V)

QT 239

Abstract: SC239 sc238 74HCT239 74HCT239C 54HCT137 74HCT 74HCT137 74HCT237 74SC138C
Contextual Info: ^ S u p e r te x in c H C T /S C 1 3 7 H C T /S C 1 3 8 H C T /S C 1 3 9 H C T /S C 2 3 7 H C T /S C 2 3 8 H C T /S C 2 3 9 . Octal Decoders/Dem ultiplexers H P Product Summary Device Parameter O u tp u ts High Speed 74H C T S tandard (74SC) M ilita ry (54H C T)

SC237

Abstract: SC239 sc238 74HCT239 hct 138 tnr dip mil std 74HCT238 DIP 74HCT239D 54HCT137 74HCT
Contextual Info: ^ S u p e r te x in c H C T /S C 1 3 7 H C T /S C 1 3 8 H C T /S C 1 3 9 H C T /S C 2 3 7 H C T /S C 2 3 8 H C T /S C 2 3 9 . Octal Decoders/Dem ultiplexers H P Product Summary Device Parameter O u tp u ts High Speed 74H C T S tandard (74SC) M ilita ry (54H C T)

cd 4061

Abstract: 54ACT 74AC E20A J14A M14A N14A
Contextual Info: This Material Copyrighted By Its Respective Manufacturer Truth Table Each Half Inputs Outputs Sd Co CP L H L H H H H L L H H H X X X _s~ _s~ L D Q Q X X X H L X H L H H L L H H L H Qo Qq H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition

M14A

Abstract: N14A
Contextual Info: This Material Copyrighted By Its Respective Manufacturer Truth Table Each Half Inputs Outputs D Sd Co CP Q Q L H L H L L X X X X X X H L H L H H H H H H _s~ _s~ H L H H L L H H L X Qo Qq H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Clock Transition

s9312

Abstract: N9309B S9324
Contextual Info: SPEED/PACKAGE AVAILABILITY S9309 F,W PIN CONFIGURATION N9309 B,F TRUTH TABLE S E L E C T IN PUTS INPUTS *0 *1 *2 L L H H L L H H L L L L H H H H L H X X X X X X X X L H X X X X X X X X L H X X S0 Si B0 B1 b2 L L H H L L H H L L L L H H H H L H X X X X X X

Contextual Info: CC2824E105R-10 UNCONTROLLED DOCUMENT PHYSICAL DIMENSIONS: ELECTRICAL SPECIFICATION @ 2 5 ‘C A OPERATING TEMPERATURE RANGE: O’C TO + 1 2 5 ’C PARAMETER SYMBOL TEST LEADS Lp m-H 1 -4 /2 -3 L LEAKAGE (H H ) Ai REQUIREMENTS CONDITIONS @ 100K H z/ 50m V

Contextual Info: PIN CONFIGURATION SPEED/PACKAGE AVAILABILITY 54 F,Q 74 N TRUTH TABLE INPUTS OUTPUTS X X L H X H H H H H H H X L L L H L L L X L t t t t Î t X X X L X X X H X X a . .h X L H H X L H L X X X X X o L H H H a SHIFT/ CLOCK SERIAL PARALLEL CLEAR LOAD INHIBIT CLOCK J K

106 25K 011

Abstract: HA-2500 HA-2502 HA-2510 HA-2512 HA-2520 HA-2522 HA-2600 HA-2602 HA-2620
Contextual Info: BURN-IN CIRCUITS H A-909 H A-909, H A-2500, H A-2502, H A-2510, HA-2512, H A-2520, H A-2522, H A-2600, H A-2602, HA-2620, H A-2622, H A-2050, H A -2050A , H A-2060, HA-2060A TO-99 H < a "1 3 j— NOTES: T a = + 1 2 5 °C R- = 1 M e g o h m C-] = 0 .0 1 jU F , 1 0 0 V

TIC 2060

Abstract: TIC 2060 D MC1554 tic 2530 UA715 HA-2500 up/tic 2630 HA-2510 HA-2512 HA-2522
Contextual Info: BURN-IN CIRCUITS H A-909 H A-909, H A-2500, H A-2502, H A-2510, HA-2512, H A-2520, H A-2522, H A-2600, H A-2602, HA-2620, H A-2622, H A-2050, H A -2050A , H A-2060, HA-2060A H <a "1 TO-99 3 j— NOTES: T a = + 1 2 5 °C R- = 1 M e g o h m C-] = 0 .0 1 jU F , 1 0 0 V

MS-012-AB

Abstract: 74ALS 74ALS30A 74ALS30AD 74ALS30AN SOL-24
Contextual Info: Signetics 74ALS30A 8-lnput NAND Gate Preliminary Specification ALS Products FUNCTION TABLE INPUTS OUTPUT A B c D E F G H Ÿ H L X X X X X X X L H H H H H H H H H X L X X X X X X H X X L X X X X X H X X X L X X X X H X X X X L X X X H X X X X X L X X H X X