H JTAG Search Results

7400 series pinout diagram

Abstract: pin diagram 7400 series 7400 chip
Contextual Info: Features H H H H H H H H H H H H H H H H 18SPECint95, 16SPECfp95 @266Mhz w/1MB L2 @200Mhz 3.2 GFLOPS @ 400 MHz Peak performance Selectable bus clock (14 CPU bus dividers up to 9x) 7 selectable core to L2 frequency divisors Selectable interface voltage below 3.3 V (1.8 V, 2.5 V)

cga motorola

Abstract: PCX755B IEC C13 pinout Tag 225 600 replacement PC745B PC755B MPC7400 PowerPC755B PC755 20d100
Contextual Info: Features H H H H H H H H H H H H H H H 18.1SPECint95, estimates 12.3 SPECfp95 @400Mhz PC755B 15.7SPECint95, 9SPECfp95 @350Mhz (PC745B) 733 MIPS @ 400Mhz (PC755B) et 641 MIPS@350Mhz (PC745B) Selectable bus clock (12 CPU bus dividers up to 10x) PD typical 6,4W @ 400Mhz, full operating conditions.

MQUAD

Abstract: PowerPC-603e 603E
Contextual Info: Features H H H H H H H H 5.6 SPECint95, 4.0 SPECfp95 @ 200 MHz estimated Superscalar (3 instructions per clock peak). Dual 16KB caches. Selectable bus clock. 32-bit compatibility PowerPC implementation. On chip debug support. PD typical = 2.5 Watts (200 MHz), full operating conditions.

740P, 255 CBGA and CI-CGA packages

Abstract: ABB CONVERTER E4 CBGA360 ABB P6 cga motorola cbga 272 CI-CGA-255 740P
Contextual Info: Features H 12.4SPECint95,8.4SPECfp95 @266Mhz 750P w/1MB L2 @133Mhz H 13.5SPECint95, 9SPECfp95 @300Mhz (740P) H 488 MIPS @ 266Mhz H Selectable bus clock (11 CPU bus dividers up to 8x) H PD typical 4,2W @ 333Mhz, full operating conditions. H Nap, doze and sleep modes for power savings

Contextual Info: Includes MAX 9000A MAX 9000 Programmable Logic Device Family Data Sheet February 1998. ver. 5.01 F e a tu r e s . * H H H B H H H B S B B B High-performance CMOS EEPROM-based programmable logic devices PLDs built on third-generation Multiple Array MatriX

FFFFF314H

Abstract: TAA04 PD70F3919 catalog semiconductor
Contextual Info: User’s Manual 32 V850E/IG4-H, V850E/IH4-H User’s Manual: Hardware RENESAS MCU V850E/Ix4-H Microcontrollers V850E/IG4-H: PD70F3919 μPD70F3920 μPD70F3921 V850E/IH4-H: μPD70F3922 μPD70F3923 μPD70F3924 All information contained in these materials, including products and product specifications,

Contextual Info: User’s Manual 32 V850ES/JG3-H, V850ES/JH3-H User’s Manual: Hardware RENESAS MCU V850ES/Jx3-H Microcontrollers V850ES/JG3-H V850ES/JH3-H PD70F3760 μPD70F3765 μPD70F3761 μPD70F3766 μPD70F3762 μPD70F3767 μPD70F3770 μPD70F3771 All information contained in these materials, including products and product specifications,

2n 1305

Abstract: V850ES/JH3-H 70f3371 mcu 70f3371 dl159 Jx3-H V850ES architecture v850es/jg3-h uPD70F3760 uPD70F3762
Contextual Info: User’s Manual 32 V850ES/JG3-H, V850ES/JH3-H User’s Manual: Hardware RENESAS MCU V850ES/Jx3-H Microcontrollers V850ES/JG3-H V850ES/JH3-H PD70F3760 μPD70F3765 μPD70F3761 μPD70F3766 μPD70F3762 μPD70F3767 μPD70F3770 μPD70F3771 All information contained in these materials, including products and product specifications,

70F3925A

Abstract: PD70F3479A 70F3479 70F3925 PD70F3488A PD70F3925A PD70F3477A 1203 FXP 5V PD70F3476A PD70F3475A
Contextual Info: User’s Manual 32 V850E/SJ3-H, V850E/SK3-H User’s Manual: Hardware RENESAS MCU V850E/Sx3-H Microcontrollers V850E/SJ3-H: PD70F3474A μPD70F3477A μPD70F3931A μPD70F3934A μPD70F3937A μPD70F3475A μPD70F3478A μPD70F3932A μPD70F3935A μPD70F3938A μPD70F3476A

Contextual Info: User’s Manual 32 V850E/SJ3-H, V850E/SK3-H User’s Manual: Hardware RENESAS MCU V850E/Sx3-H Microcontrollers V850E/SJ3-H: PD70F3474A μPD70F3477A μPD70F3931B μPD70F3934B μPD70F3937B μPD70F3475A μPD70F3478A μPD70F3932B μPD70F3935B μPD70F3938B μPD70F3476A

00000490H

Abstract: R01UH0288EJ0100 PA09 8 PIN TO-3 PACKAGE DIMENSIONS basic stamp bipolar stepper motor PM94N calculations for pwm for pfc TAA 651 70F3712
Contextual Info: User’s Manual 32 V850ES/JC3-H, V850ES/JE3-H User’s Manual: Hardware RENESAS MCU V850ES/Jx3-H Microcontrollers V850ES/JC3-H PD70F3809 μPD70F3810 μPD70F3811 μPD70F3812 μPD70F3813 μPD70F3814 μPD70F3815 μPD70F3816 μPD70F3817 μPD70F3818 μPD70F3819

NM6403

Abstract: NM6404 K034 NM1281 3AA3 M16-S PC3Y
Contextual Info: K O M ilb lO T E P H M H H H 4 0 P M A I1 H 0 H H M TEXHM KA B. K a u iK a p o B 30<PEKTHBHA5I PEATIH3AUM5I 'MJlbTPOB-C! M b i y>Ke p a c c K a 3 b iB a n H 0 6 OTenecTBeHHOM n p o M e c c o p H O M N M C , p a A n n a o 6 p a 3p 6 « A p e 60 a oTK M T a ic x c e A n «

Contextual Info: Features H Processor bus frequency up to 100 MHz. H 64-bit or 32 bits data bus and 32-bit address bus. H Provides support for either asynchronous SRAM, burst SRAM, or pipelined burst SRAM. H Compliant with PCI specification, revision 2.1. H PCI interface operates up to 66 MHz/5.0 Volt compatible.

PC7400

Contextual Info: Features H Processor bus frequency up to 100 MHz. H 64-bit or 32 bits data bus and 32-bit address bus. H Provides support for either asynchronous SRAM, burst SRAM, or pipelined burst SRAM. H Compliant with PCI specification, revision 2.1. H PCI interface operates up to 66 MHz/5.0 Volt compatible.

embedded powerpc 460

Abstract: TS68EN360 powerpc 460 Profibus UART PC860 TSPC860 spll 1086 3B30D CDMA system implementation receiver
Contextual Info: Features H PowerPC single issue integer core. H Precise exception model. H Extensive system development support - on-chip watchpoints and breakpoints, - program flow tracking, - On-chip emulation OnCE development interface. H High performance (Dhrystone 2.1: 52 MIPS @ 50 MHz, 3.3V, 1.3 Watts total power).

str 6626

Abstract: tag 8833 TS127 08 T8100 MC 4538 ECTF Micro-Pro 51 T8100A T8102 T8105
Contextual Info: Advisory March 1999 Ambassador TM T8100 H.100/H.110 Interface and Time-Slot Interchanger This advisory details two changes to the AmbassadorTM T8100 H.100/H.110 Interface and Time-Slot Interchanger Preliminary Data Sheet: DS98-195NTNB. Change Affecting Page 15, Section 2.1.3 Address Mode Register

logic diagram of johnson and ring counter

Abstract: Loctite 819 Loctite 640 AD17 PC8240 Atmel LOT marking PCX8240 Loctite 576
Contextual Info: Features H 6.6 SPEC int 95, 5.5 SPECfp95 @ 266 MHz estimated H Superscalar 603e core H Integer unit (IU), floating-point unit (FPU) (user enabled or disabled), load/ store unit (LSU), system register unit (SRU), and a branch processing unit (BPU). H 16-Kbyte instruction cache

usb flash disk

Abstract: 117 ajg PD70F3370 V850ES BAV85 uPD70F3760 uPD70F3761 uPD70F3762 uPD70F3765 PD70F3767
Contextual Info: User’s Manual 32 表紙 V850ES/JG3-H, V850ES/JH3-H ユーザーズマニュアル ハードウェア編 ルネサスマイクロコンピュータ V850ES/Jx3-H マイクロコントローラ V850ES/JG3-H V850ES/JH3-H PD70F3760 μPD70F3765 μPD70F3761 μPD70F3766

codescape

Abstract: SH7055F SH7750 SH7055 Hitachi DSA0066
Contextual Info: SUPPORT TOOLS: Hardware Tools CodeScape Development System On-chip Debug Solution for SH Microcontroller and Microprocessor Devices Development Systems for Hitachi S u p e r H S H 4 , S H 3 , S H 3 - D S P, SH2-DSP and SH2 Processors CodeScape is a powerful, cost-effective development environment

Contextual Info: Integrator Series FPGAs - 1200XL and 3200DX Familes Features Cadence, Escalade, Exemplar, 1ST, Mentor Graphics, Synopsys and Viewlogic H ig h C a p a c ity • JTAG 1149.1 Boundary Scan Testing • 2,500 to 40,000 logic gates • Up to 4 Kbits configurable dual-port SRAM

T8110 H.100

Abstract: T8105 T8100A T8102 T810X T8110 TMXF84622 Agere Ambassador
Contextual Info: Product Brief August 2003 Ambassador T8110 LITE H.100/H.110 Switch Introduction Applications The T8110 LITE is the newest addition to the Ambassador series of TDM switching and backplane interconnect standard products. The T8110 LITE can switch 4096 simultaneous time slots with 32 bidirectional local streams and 32 bidirectional H.100/H.110

mb86904

Abstract: microsparc SUN MICROELECTRONICS CPGA321 MB8690 STP1012PGA STP1012PGA-85 SPARC v8 architecture BLOCK DIAGRAM sparc v8 STP1012PGA-110
Contextual Info: STP1012 S un M icro electro nics J u ly 1 9 9 7 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n T h e m icroSP A R C -II 32-b it m icro p ro cesso r is a h ig h ly integrated , h ig h -p erfo rm an ce m icroprocessor. Im p le­

HMVIP

Contextual Info: Backplane Interface TDM/TSI SWITCHES VOICE/DATA 256 x 512 256 x 256 16 10 2 K x 512 512 x 2 K 512 x 512 16L, 32B* 16L, 32B* H.110, H.100, HMVIP 4Kx2K 2Kx4K 1Kx1K 2Kx2K 16L*, 32B* 16L*, 32B* 4Kx2K H.110, H.100, HMVIP 4Kx2K 2Kx4K 2Kx2K 2Kx2K 16L, 32B* 16L, 32B*

Contextual Info: Pentium III Processor at 450 MHz, 500 MHz, and 550 MHz Datasheet Product Features • A vailable at 450 M H z, 500 M H z, and 550 M H z ■ System bus frequency at 100 M H z ■ B inary com patible w ith applications running on previous m em bers o f the Intel