GNDT Search Results

Contextual Info: SRAM Test Configuration Input Pulse Levels Input Rise/Fall Times Input Timing Reference Levels Output Reference Levels Output Load +5V Figure 1. GNDto 3.0V 3 ns 1.5V 1.5V See Figures +5V Output test loads for: 4Kx4, 16Kx4, 64Kx4, 32Kx8 &128Kx8 SRAMs Except Low-Power

365 pF variable capacitor

Abstract: LT1011
Contextual Info: LT1011, LT1011A VOLTAGE COMPARATORS _D3179, JANUARY 19B9 • Low Input O ffset V o lta g e . . . 1.5 or 0.5 mV Max JG OR P PACKAGE TOP VIEW GNDT • Maximum Input Bias C u rre n t. . . 50 o r 25 nA 0 7 IN + C • Low Input O ffset C u rre n t. . . 4 o r 3 nA Max

Contextual Info: VDD ISET LP5522 LED CTRL GND GNDT

lt928

Abstract: 55328P TC55328J
Contextual Info: 3 2 ,7 6 8 W O R D x 8 B IT C M O S S TA TIC R A M D E S C R IP T IO N The TC55328P/J is a 262,144 bits high speed static random access memory organized as 32,768 words by 8 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's CMOS

Contextual Info: SMJ27C210 1 048576-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY SM G S028A — MARCH 19B8 — REVISED N O VEM BER 1990 J Package Top View Single 5-V Power Supply Operationally Compatible With Existing Megabit EPROMs 40-Pln Dual-In-line Package All Inputs and Outputs Fully TTL

ndm diode

Abstract: 1C20h ADC12D1800 DSP/VHDL code for ADC and DOC SPI with FPGA
Contextual Info: ADC12D1800 ADC12D1800 12-Bit, Single 3.6 GSPS Ultra High-Speed ADC Literature Number: SNAS500L ADC12D1800 12-Bit, Single 3.6 GSPS Ultra High-Speed ADC 1.0 General Description 3.0 Features The 12-bit, 3.6 GSPS ADC12D1800 is the latest advance in National's Ultra-High-Speed ADC family and builds upon the

msi 7267 MOTHERBOARD SERVICE MANUAL

Abstract: ttl cookbook msi ms 7267 MOTHERBOARD CIRCUIT diagram "0.4mm" bga "ball collapse" height PCF 799 crystal oscillator 8MHz 4 pins smd diode MARKING F5 44C smd TRANSISTOR code marking A7 terminals diagram of smd transistor bo2 cookbook for ic 555
Contextual Info: GTL/GTLP Logic High-Performance Backplane Drivers Data Book Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments and its subsidiaries TI reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information

Contextual Info: MTE Advance Information D • SöböMSb D GG2G5 3 3f l b ■ lllir n lll MNHS January 1991 NATRA M H S M 67202 HI-REL DATA SHEET 1kX 9 CMOS PARALLEL FIFO FEATURES EMPTY, FULL AND HALF FLAGS IN SINGLE DEVICE MODE RETRANSMIT CAPABILITY BI-DIRECTIONAL APPLICATIONS

D 7520 C

Abstract: 7524 Core Memory Sense Amplifier QR15V IC 7522
Contextual Info: 7520/ 22/ 24/ 28/ 232/234 DESCRIPTION The 7520 series of dual channel sense am­ plifiers are designed for use w ith high speed core memory systems. These sense am plifi­ ers detect low level bipolar differential sig­ nals from the memory and provide the inter­

A115-A

Abstract: C101 SN74GTLP817 SN74GTLP817DW SN74GTLP817DWR
Contextual Info: SN74GTLP817 GTLP-TO-LVTTL 1-TO-6 FANOUT DRIVER SCES285C – OCTOBER 1999 – REVISED FEBRUARY 2001 D D D D D D D D D D D D DGV, DW, OR PW PACKAGE TOP VIEW OEC Circuitry Improves Signal Integrity and Reduces Electromagnetic Interference Bidirectional Interface Between GTLP

GaAs MMIC SPDT TERMINATED SWITCH DC 6GHz

Abstract: NN12 P35-4215-0 P35-4215-1R P35-4215-1T
Contextual Info: P35-4215-0 GaAs MMIC SPDT REFLECTIVE/NON-REFLECTIVE SWITCH, DC - 4GHz Features • • Broadband performance Low insertion loss; 0.5dB typ at 2GHz • Ultra low DC power consumption • Fast switching speed; 3ns typical • Chip form Description The P35-4215-0 is a high performance Gallium Arsenide single pole double throw broadband RF switch

NE550

Abstract: 8t90 SE550 negative floating regulator SE550L
Contextual Info: SE/NE550-F.L.N DESCRIPTION FEATURES The 550 is a precision m onolithic voltage regulator capable of positive or negative supply operation as series, shunt, switching or floating regulator. Guaranteed line regu­ lation is provided for input voltages ranging

8GHz transceiver specification

Abstract: Antenna 5.8ghz LPCC pll fsk MODULATOR ML5800 ML5800DM ML5800DM-T 5.8ghz LPCC 24
Contextual Info: PRODUCT BRIEF ML5800 5.8GHz Low-IF 1.5Mbps FSK Transceiver The ML5800 is a high integration 5.8GHz Frequency Shift Keyed FSK transceiver that integrates all frequency generation, receive, and transmit functions required to realize a digital cordless telephone. Only a power amplifier (PA) and antenna

R0921

Abstract: WM4001-ND 82C106 D893 HFBR-2316T pcc103bnct-ND s1212 wm4001 p130a O8O5
Contextual Info: ML6651 10/100Mbps Fiber and Copper Ethernet Media Converter User’s Guide OVERVIEW FEATURES The ML6651 Evaluation Board demonstrates the capabilities of the ML6651. The eval-board’s block diagram is shown in Figure 1. This integrated circuit is a Media

schematic diagram cga to vga

Abstract: DD11D1D SCHEMATIC mda VGA board cga ega vga RAMDAC DIP BT477 TTL sync video CGA to vga schematic diagram cga to vga circuit convert ega to vga I334 cga to vga
Contextual Info: UM•■ ■■• ■■ ■■ai i v a n i r à 82C453 Ultra VGA Graphics Controller ■ High Performance VRAM VGA optimized for 800x600 and 1024x768, 16 and 256 color, display resolutions interlaced/non-interlaced ■ 4 VRAMs (256Kx4) support all Super VGA

1S26

Abstract: P4C116 P4C116L AD5e
Contextual Info: PERFORMANCE SEMICONDUCTOR SDE V • 7 0 b 2 5 cl7 0001780 3äb * P S C P4C116/P4C116L ULTRA HIGH SPEED 2K x 8 STATIC CMOS RAMS SCRAMS FEATURES ■ Full CMOS, 6T Cell Single 5V±10% Power Supply ■ High Speed (Equal Access and Cycle Times) -12,15/20/25/35 ns (Commercial)

Contextual Info: TPS40140 DUAL OR 2-PHASE, STACKABLE CONTROLLER www.ti.com SLUS660F – SEPTEMBER 2005 – REVISED SEPTEMBER 2009 1 INTRODUCTION 1.1 FEATURES • VDD From 4.5 V to 15 V, With Internal 5-V Regulator VOUT From 0.7 V to 5.8 V Converts From 15-V Input to 0.7-V Output at

BT453

Contextual Info: Advance Information C l need AdVM ¡“ o Aicro Am81C453 CMOS Color Palette Devices DISTINCTIVE CHARACTERISTICS Plug-In replacement for Bt453 • Triple 8-blt DACs ■ Macintosh II compatible ■ RS343A/RS-l70A-compatlble RGB outputs ■ Available In 40- and 66-MHz versions

Contextual Info: User's Guide SLAU377 – October 2011 ADS5292, 8-Channel, Analog-to-Digital Converter Evaluation Module This user’s guide gives a general overview of the evaluation module EVM and provides a general description of the features and functions to be considered while using this module. This manual is

Contextual Info: User's Guide SLAU355 – July 2011 ADS5294, 8-Channel, Analog-to-Digital Converter Evaluation Module This user’s guide gives a general overview of the evaluation module EVM and provides a general description of the features and functions to be considered while using this module. This manual is

Contextual Info: ¡¡ S ix 1 28K X 32 CMOS STATIC RAM MODULE \ y Integrated Device Technology, Inc. IDT7MP4095 FEATURES: DESCRIPTION: • High density 4 m egabit static RAM m odule The IDT7MP4095 is a 128K x 32 static RAM module constructed on an epoxy laminate FR-4 substrate using four

Contextual Info: SIEMENS 5-V Low-Drop Voltage Regulator T LE 4263 Preliminary Data Bipolar 1C Features • • • • • • • • • • Output voltage tolerance < ± 2% Low-drop voltage Very low standby current consumption Overtemperature protection Reverse polarity protection

Contextual Info: 9-BIT BUS EXCHANGE SWITCH IDT74FST163209 ADVANCE INFORMATION or source capability. Thus they generate little or no noise of their own while providing a low resistance path for an external driver. These devices connect input and output ports through an n-channel FET. When the gate-to-source junction of this

Contextual Info: 1»ill 1IFV1F 1 1 U 1 ‘! S y P r • W 0 L HIGH-SPEED 3.3V 16K x 36 SYNCHRONOUS PIPELINED DUAL-PORT STATIC RAM PRELIMINARY IDT70V3569S F ea tu re s: ♦ True Dual-Ported memory cells which allow simultaneous access of the same memory location ♦ High-speed clock to data access