GD54HCT1 Search Results

Contextual Info: GD54/74HC191, GD54/74HCT191 SYNCHRONOUS 4-BIT BINARY UP-DOWN COUNTER WITH MODE CONTROL General Description These d e vices are identical in pinout to the 5 4 /7 4 L S 1 9 1 . This synch ron ous, reversible, 4-B it binary up/down counter can be preset by applying the

Contextual Info: GD54/74HC158, GD54/74HCT158 QUAD 2-INPUT SELECTORS/MULTIPLEXERS WITH INVERTED OUTPUT General Description These devices are identical in pinout to the 5 4 /7 4 L S 1 5 8 . They consist of four 2-Input multiplex­ ers with com m on select and enable inputs, and in­

CD74HC14

Abstract: CD74HCT14E cd74HCT14 harris
Contextual Info: {SJ HARRIS CD74HC14, CD74HCT14 S E M I C O N D U C T O R High Speed CMOS Logic January 1998 H ex In vertin g S c h m itt T rig g e r Features • Description The Harris CD74HC14, CD74HCT14 each inverting Schmitt Triggers in one package. U n lim ited Inp u t R ise and Fall T im e s

Contextual Info: GD54/74HC173, GD54/74HCT173 QUAD 3-STATE D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description These d evices are identical in pinout to the Pin Configuration 5 4 /7 4 L S 1 7 3 . T h e y consist o f four D -type flip-flops operating synchronously from a com m on C lo ck

Contextual Info: GD54/74HC139, GD54/74HCT139 DUAL 2-TO-4 LINE DECODER/DEMULTIPLEXER General Description These devices are identical in pinout to the 54/74L S 1 39. They contain two independent 1-of-4 decoders each with a single active-low enable in­ put. Each circuit decodes a 2-bit address to 1 -of-4

GD74HC160

Contextual Info: GD54/74HC160, GD54/74HCT160 SYNCHRONOUS DECADE COUNTER WITH ASYNCHRONOUS CLEAR General Description Pin Configuration These d e vice s are identical in pinout to the 5 4 /7 4 L S 1 6 0 . T hey contain a 4 -b it decade co u n te r con sistin g o f fou r flip-flops. All flip-flops are c lo c k ­

GD74HC174

Abstract: 74HC
Contextual Info: GD54/74HC174, GD54/74HCTI74 HEX D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description Pin Configuration com m on clock and clear inputs. Data on the D in­ puts having the specified setup and hold tim es are transferred to the outputs on the rising ed g e of the

74hc157

Abstract: 74hct157
Contextual Info: GD54/74HC157, GD54/74HCT157 QUAD 2-INPUT SELECTORS/MULTIPLEXERS WITH NONINVERTED OUTPUT General Description T h ese devices are identical in pinout to the Pin Configuration 5 4 /7 4 L S 1 5 7 . They consist of four 2-input multiplex­ ers with com m on se lec t and enable inputs, and

74HCT133

Abstract: 74HC133 74HC GD74HC133 TTL 74ls133 PIN CONFIGURATION OF 74LS133
Contextual Info: GD54/74HC133, GD54/74HCT133 13-INPUT NAND GATE General Description These devices are identical in pinout to the 5 4 /7 4 L S 1 3 3 . They contain a single 13-input NAND gate. These devices are characterized for operation over wide temperature ranges to meet industry and

Contextual Info: GD54/74HC174, GD54/74HCT174 HEX D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description These devices are identical in pinout to the 54/74L S 174. They contain six D-type flip-flops with common clock and clear inputs. Data on the D in­ puts having the specified setup and hold times are

Contextual Info: GD54/74HC125, GD54/74HCT125 QUAD 3-STATE ACT-LOW NONINVERTING BUFFERS General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 1 2 5 . They contain four independent 3-state noninverting buffers which are designed to

74HCT155

Abstract: 74hc155 74ls155 pin configuration 74HC GD74HC155 48 H diode
Contextual Info: GD54/74HC155, GD54/74HCT155 DUAL 2-TO-4 LINE DECODERS/DEMULTIPLEXERS General Description These d evices 5 4 /7 4 L S 1 5 5 . are identical They in pinout contain tw o to 1 -to -4 the line Pin Configuration dem ultiplexers with individual enable inputs, in­

GD74HCT10

Abstract: GD74HC10
Contextual Info: GD54/74HC10, GD54/74HCT10 TRIPLE 3-INPUT NAND GATES General Description These devices are identical in pinout to the 5 4 /74 L S 1 0. They contain three independent 3-input NAND gates. These devices are characteriz­ ed for operation over wide temperature ranges to

Contextual Info: GD54/74HC126, GD54/74HCT126 QUAD 3-STATE ACT-HIGH NONINVERTING BUFFERS General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 1 26. They contain four independent 3-state noninverting buffers which are designed to

Contextual Info: GD54/74HC107, GD54/74HCT107 DUAL J-K FLIP-FLOPS WITH CLEAR General Description These devices are identical in pinout to the 5 4 /7 4 L S 1 0 7 . They consist of two J-K flip-flops with individual J, K, clock, and clear inputs. These flipflops are edge sensitive to the clock input and

logic diagram of 74HC147

Contextual Info: GD54/74HC147, GD54/74HCT147 1Q-T0-4 LINE DECIMAL-TO-BCD PRIORITY ENCODER General Description Pin Configuration These devices are identical in pinout to the 5 4 /74L S 147. This encoder features priority encording of the inputs to ensure that only the highest

Contextual Info: GD54/74HC157, GD54/74HCT157 QUAD 2-INPUT SELECTORS/MULTIPLEXERS WITH NONINVERTED OUTPUT General Description Pin Configuration These devices are identical in pinout to the 54/74LS 157. They consist of four 2-input multiplex­ ers with common select and enable inputs, and

74HC

Abstract: GD54HC174 GD74HC174 74hc174
Contextual Info: GD54/74HC174, GD54/74HCT174 HEX D-TYPE FLIP-FLOPS WITH COMMON CLOCK & CLEAR General Description Pin Configuration These devices are identical in pinout to the 5 4 /7 4 L S 1 74. They contain six D-type flip-flops with common clock and clear inputs. Data on the D in­

74HCT148

Abstract: 74HC148 74ls148 octal to binary encoder encoder 74HC148 74HC GD54HC148 GD74HC148 GD74HCT14 pin diagram priority encoder 74ls148 GD74HC14
Contextual Info: GD54/74HC148, GD54/74HCT148 8-TO-3 LINE PRIORITY ENCODER General Description These devices are identical in pinout to the 5 4 /7 4 L S 1 48. This encoder features priority en­ coding of the inputs to ensure that only the highest order data line is encoded. Eight active-low data in­

74HC139

Abstract: 74ls139 decoder pin configuration 74ls139 decoder
Contextual Info: GD54/74HC139, GD54/74HCT139 DUAL 2-TO-4 LINE DECODER/DEMULTIPLEXER General Description These d evices are identical in pinout to the Pin Configuration 5 4 /7 4 L S 1 3 9 . T hey contain tw o independent 1 -of-4 active-low outputs. Data on the se lec t inputs A, B

GD74HC161

Contextual Info: GD54/74HC161, GD54/74HCT161 SYNCHRONOUS BINARY COUNTER WITH ASYNCHRONOUS CLEAR General Description These d evices are identical in pinout to Pin Configijration the 5 4 / 7 4 L S 1 6 1 . T h e y contain a 4-b it binary counter consisting of four flip-flops. All flip-flops are clock­

equivalent data book of 10N60 mosfet

Abstract: MC14016CP GD4511 an-6466 CX 2859 SMD 74AC14 spice 6120* harris HCF4018be 7028 SMD Transistor spice irfbc40
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