FUSION Search Results

Contextual Info: MX85xxxx Family Complete Clocking Solution with Integrated Crystal, Synthesizer, and Fanout ClockWorks Fusion General Description Features Micrel’s MX85xxxx family of parts are ultra-low phase noise clocking solutions that integrate the crystal, synthesizer, and fanout buffers, providing up to two

AC270

Abstract: verilog code for slave SPI with FPGA spi slave AFS090
Contextual Info: Application Note AC270 SPI Flash Emulation for Fusion Devices Design Example Contents General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

AC307

Abstract: SPARTAN 3E STARTER BOARD L262144 memory 2114 XILINX/SPARTAN 3E STARTER BOARD AFS090 generic SPI AFS-EVAL
Contextual Info: Application Note AC307 Configuring SRAM FPGAs Using Actel Fusion Introduction Due to the nature of SRAM technology, SRAM-based FPGAs are volatile and lose their configuration when powered off, so they must be reconfigured at every power-up. Hence, almost every system using SRAMbased FPGAs contains an additional nonvolatile memory, such as flash PROM or EEPROM, to store the

LTM4062

Abstract: CORE8051 ADC DAC Verilog 2 bit Implementation AC321
Contextual Info: Application Note AC321 Using Fusion for Closed-Loop Power Supply Margining Overview A growing number of embedded systems designers want the ability to dynamically alter the precise value of a power supply's voltage. Closed-loop power supply margining is a technique whereby a power rail is

ACTEL FUSION AFS1500

Abstract: FlashPro3 PQ208 QN108 QN180 M1AFS1500 AFS250 rc oscillator M-LVDS
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator

verilog code voltage regulator

Abstract: verilog code for adc verilog code voltage regulator vhdl verilog code for amba apb bus 16bit microprocessor using vhdl simple ADC Verilog code verilog code for apb vhdl code for Clock divider for FPGA vhdl code for frequency divider APB VHDL code
Contextual Info: P ro du c t Br ie f CoreAI Product Summary Synthesis and Simulation Support Intended Use • Analog Interface Control Using a Microprocessor/ Microcontroller and an Actel FusionTM Device • Voltage, Current, and Temperature Monitoring Using a Microprocessor/Microcontroller and an

CORE8051

Abstract: FlashPro3 AES-128 FG256 PQ208 ac motor variable speed control rc oscillator
Contextual Info: Preliminary v0.4 Actel Fusion Mixed-Signal FPGA for the MicroBlade Advanced Mezzanine Card Solution Features and Benefits • Targeted to Advanced Mezzanine Card AdvancedMC Designs • Designed in Partnership with MicroBlade • 8051-Based Module Management Controller (MMC)

AFS600-FG256

Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator

ASF600

Abstract: VHDL code of lcd display vhdl code for lcd display RTC A 250 2N2222A AC271 PN2222A LCD module in VHDL rtc 294 regulator power supply
Contextual Info: Application Note AC271 Real-Time Calendar Applications in Actel Fusion Devices Introduction The Actel Fusion Programmable System Chip is the world's first mixed-signal FPGA, integrating configurable analog, a real-time counter RTC , Flash memory blocks, and clock generation circuits—all in

Contextual Info: 3M Fiber Optics • Crimplok and Hot-melt connectors • A broad choice of single- and multimode connectors, couplings and attenuators • A wide choice of terminating kits, modules and splicing systems • Tool and preparation kits, organizer trays and fusion inserts

Contextual Info: FuseLite Single-Fiber Splice-On Connectors Features and Benefits Broad operating temperature -40° to +75°C Utility and flexibility Factory-polished end face Consistent optical performance Fusion splice connectivity Ideal for reflectance-sensitive applications

Contextual Info: FREEDM UltraRibbon Gel-Free Cable, Riser Features and Benefits 288-432 fibers in a compact design Maximizes use of critical duct space Hand-splittable ribbon Facilitates mass-fusion splicing with 12-fiber units and no stray fibers 12-fiber ribbons individually numbered

Contextual Info: FuseFlex Termination System Components, SC UPC Jacketed Cable, SC UPC 133 The FuseFlex® Termination System connector is a “near­ -zero­-length” pigtail allowing field installation by fusion splicing to the field fiber outside the physical boundaries

A54 ZENER

Abstract: AFS600-FG256 mark AT0 QN108 CORE8051 bipolar ROM
Contextual Info: v2.0 Actel Fusion Family of Mixed-Signal FPGAs Features and Benefits In-System Programming ISP and Security High-Performance Reprogrammable Flash Technology Advanced Digital I/O • • • • • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents

LSISAS2008

Abstract: LSISAS2004 LSISAS2108 Fusion-MPT Message Passing Interface MPI specification Fusion-MPT Message Passing Interface Specification LSISAS SAS2008 DG072A9BB7 LSI sas2008 lsisas2008 datasheet
Contextual Info: SAS2 Integrated RAID Solution User Guide Version 1.0 July 2009 Revision History Version and Date Version 1.0, July 2009 Description of Changes Initial release of this document. LSI, the LSI logo, Fusion-MPT, Integrated RAID, Integrated Mirroring, and Integrated Striping are trademarks or registered trademarks of LSI Corporation or its subsidiaries. SPARC is a registered trademark of SPARC International, Inc. Linux is a registered trademark of Linus Torvalds. Windows and MS-DOS are registered trademarks of Microsoft Corporation. All other brand and product names may

NovaSensor

Abstract: Lucas NovaSensor Lucas Sensor NovaSensor application note NPP-301-100A NPP-301-200A NPP-301 NPP-301-700A barometer SM0025
Contextual Info: Lucas NovaSensor NPP-301 Series Surface Mount Pressure Sensor DESCRIPTION The NPP Series features silicon pressure sensors in surface mount packages. An ultra-small Silicon Fusion Bonded SFB , ultra-high stability SenStable® piezoresistive chip from Lucas NovaSensor® is placed in a plastic package that

Fusion 878A

Abstract: conexant fusion 878A bt878 878a planar YUV Bt878 "pin compatible" National video phone DTV 9696 Composite Video to VGA decoder circuit conexant fusion 878A"
Contextual Info: digital infotainment products PCl Video Decoder F u s i o n 8 7 8 A Conexant’s Fusion Family of PCI Video Decoders Integrates Broadcast Video and Data Capture, and Playback in a Single Chip TM The newest addition to the Fusion family of PCI video decoders

Contextual Info: Multiphase PWM Regulator for AMD Fusion Desktop CPUs Using SVI 2.0 ISL95712 Features The ISL95712 is fully compliant with AMD Fusion™ SVI 2.0 and provides a complete solution for microprocessor and graphics processor core power. The ISL95712 controller supports two

ISL6267

Abstract: amd fusion torpedo ISL6267HRZ marking code V3P ISL6208 ISL6267EVAL1Z TB347 TB363 TB379
Contextual Info: Multiphase PWM Regulator for AMD Fusion Mobile CPUs ISL6267 Features The ISL6267 is designed to be completely compliant with AMD Fusion™ specifications. The ISL6267 controls two Voltage Regulators VRs with three integrated gate drivers. The first VR

IDT77155

Abstract: IDT77V400 IDT77V500 IDT77V550 IDT79R36100 IDT79RV3041 IDT79RV4640 s-link
Contextual Info: SECTION 3 IDT77V500 Switch Controller 3.1 IDT77V500 Switch Controller Description The IDT77V500 manages the IDT77V400, a single device shared memory ATM switch. The IDT77V400 provides cell buffers implemented in Fusion Memory technology and, as the name implies, a data path for ATM cells. It also provides a means by which an external

Contextual Info: Multiphase PWM Regulator for AMD Fusion Mobile CPUs Using SVI 2.0 ISL62773A Features The ISL62773A is fully compliant with AMD Fusion™ SVI 2.0 and provides a complete solution for microprocessor and graphics processor core power. The ISL62773A controller

a51 ZENER DIODE

Abstract: transistor 2n2222 bipolar ROM EQUIVALENCES TRANSISTOR LIST ProASIC3 lvds yl 1060
Contextual Info: Revision 3 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

Contextual Info: phyFLEX -i.MX 6 System on Module - PRODUCT BRIEF phyFLEX Innovation – Fusion between lexibility, scalability, and compatibility: EASIER Building a new embedded // Connector 1 is the phyFLEX standardized connector, providing 100% compatibility up and down the phyFLEX family

RT8111

Abstract: G-T52R
Contextual Info: Express-GFC Compact COM Express Type 6 Module with AMD Fusion G-Series Processor and A50M Controller Hub Features Type 6 AMD Fusion™ G-Series Processor AMD A50M Controller Hub Up to 8GB Dual Channel DDR3 SDRAM at 1333MHz Two DDI Digital Display Interface for