FOUR INPUT NAND GATE Search Results
FOUR INPUT NAND GATE Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
|---|---|---|---|---|---|
| 54S133/BEA |
|
54S133 - NAND GATE, 13-INPUT - Dual marked (M38510/07009BEA) |
|
||
| 54HC30/BCA |
|
54HC30 - 8-Input NAND Gates - Dual marked (M38510/65004BCA) |
|
||
| 54S30/BCA |
|
54S30 - NAND GATE, 8-INPUT - Dual marked (M38510/07008BCA) |
|
||
| 54L10/BDA |
|
54L10 - NAND GATE, TRIPLE 3-INPUT - Dual marked (M38510/02003BDA) |
|
||
| 5420/BDA |
|
5420 - NAND GATE, DUAL 4-INPUT - Dual marked (M38510/00102BDA) |
|
FOUR INPUT NAND GATE Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
MB87026
Abstract: MB74HC
|
OCR Scan |
MB87026 MB87026 MB74HC | |
|
Contextual Info: 54AC00,54ACT00 54AC00/54ACT00 Quad 2-Input NAND Gate Literature Number: SNOS076A 54AC00/54ACT00 Quad 2-Input NAND Gate General Description The 'AC/'ACT00 contains four 2-input NAND gates. Features • ICC reduced by 50% ■ Outputs source/sink 24 mA Logic Symbol |
Original |
54AC00 54ACT00 54AC00/54ACT00 SNOS076A ACT00 ACT00: | |
|
Contextual Info: CD4093BC,CD4093BM CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger Literature Number: SNOS369A CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger Y Y The CD4093B consists of four Schmitt-trigger circuits Each circuit functions as a 2-input NAND gate with Schmitt-trigger |
Original |
CD4093BC CD4093BM CD4093BM SNOS369A CD4093B | |
0342 fan
Abstract: 74F132 N74F132D N74F132N NAND Qualification Reliability
|
Original |
74F132 74F132 0342 fan N74F132D N74F132N NAND Qualification Reliability | |
751A-03
Abstract: 74AC ACT132 MC74AC132 MC74ACT132 74ACT132
|
Original |
MC74AC132 MC74ACT132 MC74AC/74ACT132 MC74AC132/D* MC74AC132/D 751A-03 74AC ACT132 MC74AC132 MC74ACT132 74ACT132 | |
DM54L00JContextual Info: DM54L00 DM54L00 Quad 2-Input NAND Gates Literature Number: SNOS264A DM54L00 Quad 2-Input NAND Gates General Description This device contains four independent gates each of which performs the logic NAND function Connection Diagram Function Table Dual-In-Line Package |
Original |
DM54L00 DM54L00 SNOS264A DM54L00J DM54L00W C1995 RRD-B30M105 | |
|
Contextual Info: 54AC20 54AC20 Dual 4-Input NAND Gate Literature Number: SNOS083 54AC20 Dual 4-Input NAND Gate General Description The ’AC20 contains four 4-input NAND gates. n Outputs source/sink 24 mA n Standard Military Drawing SMD n ’AC20: 5962-87613 Features n ICC reduced by 50% |
Original |
54AC20 54AC20 SNOS083 DS100264-1 DS100264-3 DS100264-2 DS100264 | |
|
Contextual Info: Quad 2ĆInput NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2-input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have greater noise margin than conventional NAND gates. |
Original |
MC74AC/74ACT132 r14525 MC74AC132/D | |
ACT132Contextual Info: MC74AC132, MC74ACT132 Quad 2-Input NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates. |
Original |
MC74AC132, MC74ACT132 MC74AC/74ACT132 PDIP-14 74ACT MC74ACT132 MC74AC132N SO-14 ACT132 | |
|
Contextual Info: National Semiconductor 54F/74F132 Quad 2-Input NAND Schmitt Trigger General Description The ’F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing |
OCR Scan |
54F/74F132 D0A2231 bSD112 DD62232 | |
74ac132
Abstract: 74ACT132 ACT132 MC74AC132 MC74AC132D MC74AC132DR2 MC74AC132N MC74ACT132 MC74ACT132D MC74ACT132DR2
|
Original |
MC74AC132, MC74ACT132 MC74AC/74ACT132 r14525 MC74AC132/D 74ac132 74ACT132 ACT132 MC74AC132 MC74AC132D MC74AC132DR2 MC74AC132N MC74ACT132 MC74ACT132D MC74ACT132DR2 | |
AC132
Abstract: 74ac132
|
Original |
MC74AC132, MC74ACT132 MC74AC/74ACT132 74ACT MC74ACT132 MC74AC132N AC132 74AC13 MC74ACT132N 74ac132 | |
LS132
Abstract: T54LS24D2
|
OCR Scan |
T54LS24/T74LS24 LS132 T54LS24D2 | |
4 inputs positive OR gatesContextual Info: MOTOROLA M C74A C 132 M C 74A C T132 Quad 2-In p ut NAND S ch m itt Trigger QUAD 2-INPUT NAND SCHMITT TRIGGER The MC74AC/74ACT132 contains four 2-input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter-free output |
OCR Scan |
MC74AC/74ACT132 MC74AC132 MC74ACT132 74ACT 4 inputs positive OR gates | |
|
|
|||
ic 74132
Abstract: f 74132 LS132 74132 853051 R/ls 74132
|
OCR Scan |
LS132 ic 74132 f 74132 LS132 74132 853051 R/ls 74132 | |
DM74LS132
Abstract: DM74LS132M DM74LS132N DM74LS132SJ M14A M14D MS-001 N14A
|
Original |
DM74LS132 DM74LS132M 14-Lead MS-120, DM74LS132SJ DM74LS132N MS-001, DM74LS132 DM74LS132M DM74LS132N DM74LS132SJ M14A M14D MS-001 N14A | |
LT 5216
Abstract: ic 74132 LT 5212 74132 LT 5215 f 74132 74132 data LS132 ls132 equivalent TTL 74LS 00
|
OCR Scan |
LS132 OP01670S LT 5216 ic 74132 LT 5212 74132 LT 5215 f 74132 74132 data LS132 ls132 equivalent TTL 74LS 00 | |
74132
Abstract: f 74132 74ls gate symbols 74Ls signetics LS132 74ls ttl 132 1N3064 1N916 74LS 74LS132
|
OCR Scan |
LSI32 74132 f 74132 74ls gate symbols 74Ls signetics LS132 74ls ttl 132 1N3064 1N916 74LS 74LS132 | |
|
Contextual Info: AVG Semiconductors DDi Technical Data DV74HC03A Quad 2-Input NAND Gate with Open-Drain Outputs This device contains four independent 2-input NAND buffers, each of which performs the logic NAND function in positive logic. The open-drain outputs require pull-up resistors to per |
OCR Scan |
DV74HC03A AVG-001 1-800-AVG-SEMI | |
|
Contextual Info: AVG DDi Semiconductors Technical Data DV74LS03 DV74ALS03B Quad 2-Input NAND Gate with Open-Collector Outputs This device contains four independent 2-input NAND buffers, each of which performs the logic NAND function in positive logic. The open-collector outputs require pull-up resistors to |
OCR Scan |
DV74LS03 DV74ALS03B AVG-001 ALS03B DV74LS03, 1-800-AVG-SEMI | |
ALS03
Abstract: LS03 ALS03B ALS series NAND gate
|
OCR Scan |
DV74LS03 DV74ALS03B AVG-001Case AVG-002 ALS03B DV74LS03, 1-800-AVG-SEMI ALS03 LS03 ALS series NAND gate | |
|
Contextual Info: 132 54F/74F132 Connection Diagrams Quad 2-Input NAND Schm itt Trigger D s four 2-input NAND gates which accept standard TTL iyide standard TTL output levels. They are capable of input s ^ n lyjfhanging input signals into sharply defined, jitter-free transformi |
OCR Scan |
54F/74F132 54F/74F | |
|
Contextual Info: yVA National  æ Semiconductor PRELIMINARY 54F/74F132 Quad 2-Input NAND Schmitt Trigger General Description The ’F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing |
OCR Scan |
54F/74F132 54F10% 74F10% | |
50133
Abstract: 74F132 N74F132D N74F132N
|
OCR Scan |
74F132 74F132 500ns 50133 N74F132D N74F132N | |