FOUR INPUT NAND GATE Search Results

DM54L00J

Contextual Info: DM54L00 DM54L00 Quad 2-Input NAND Gates Literature Number: SNOS264A DM54L00 Quad 2-Input NAND Gates General Description This device contains four independent gates each of which performs the logic NAND function Connection Diagram Function Table Dual-In-Line Package

74ac132

Abstract: 74ACT132 ACT132 MC74AC132 MC74AC132D MC74AC132DR2 MC74AC132N MC74ACT132 MC74ACT132D MC74ACT132DR2
Contextual Info: MC74AC132, MC74ACT132 Quad 2-Input NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2–input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter–free output signals. In addition, they have greater noise margin than conventional NAND gates.

Contextual Info: M M O T O R O L A M C74AC132 M C74A C T132 Quad 2-Input NAND S ch m itt Trigger QUAD 2-INPUT NAND SCHMITT TRIGGER The MC74AC/74ACT132 contains four 2-input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter-free output

DM74LS132

Abstract: DM74LS132M DM74LS132N DM74LS132SJ M14A M14D MS-001 N14A
Contextual Info: Revised March 2000 DM74LS132 Quad 2-Input NAND Gate with Schmitt Trigger Input General Description This device contains four independent gates each of which performs the logic NAND function. Each input has hysteresis which increases the noise immunity and transforms a

74LS132

Abstract: SN74LS132 SN74LS132D SN74LS132N
Contextual Info: SN74LS132 Quad 2-Input Schmitt Trigger NAND Gate The SN74LS132 contains four 2-Input NAND Gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. Additionally, they have

Contextual Info: Revised November 2004 74VCX132 Low Voltage Quad 2-Input NAND Gate with Schmitt Trigger Inputs and 3.6V Tolerant Inputs and Outputs General Description Features The VCX132 contains four 2-input NAND gates with Schmitt Trigger Inputs. The pin configuration and function

74LVQ00

Abstract: 74LVQ00SC 74LVQ00SCX 74LVQ00SJ 74LVQ00SJX M14A M14D s070 DD0-2
Contextual Info: National Semiconductor 74LVQ00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVQOO contains four 2-input NAND gates. • Ideal for low power/low noise 3.3V applications ■ Guaranteed simultaneous switching noise level and dynamic threshold performance

74LVX00

Abstract: 74LVX00M 74LVX00MTC 74LVX00SJ LVX00 M14A M14D MTC14
Contextual Info: Revised March 1999 74LVX00 Low Voltage Quad 2-Input NAND Gate General Description Features The LVX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • Input voltage level translation from 5V to 3V

74VCX38

Abstract: 74VCX38M 74VCX38MTC M14A MTC14
Contextual Info: Revised July 1999 74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs General Description Features The VCX38 contains four 2-input NAND gates with open drain outputs. This product is designed for low voltage

74VCX38

Abstract: 74VCX38BQX 74VCX38M 74VCX38MTC 74VCX38MTCX M14A MLP014A MTC14
Contextual Info: Revised February 2005 74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs General Description Features The VCX38 contains four 2-input NAND gates with open drain outputs. This product is designed for low voltage

CHT-74132-CDIL14-T

Contextual Info: The Leader in High Temperature Semiconductor Solutions CHT-74132 DATASHEET Version: 3.5 1-Oct-12 Last Modification Date High-Temperature, Quad 2-Input NAND Schmitt Trigger General Description Features The CHT-74132 contains four independent 2-input NAND gates with Schmitt Trigger,

74ac132

Abstract: AC132G ACT132G 74AC ACT132 MC74AC132 MC74AC132N MC74ACT132 SOEIAJ-14 MC74AC132NG
Contextual Info: MC74AC132, MC74ACT132 Quad 2−Input NAND Schmitt Trigger The MC74AC/74ACT132 contains four 2−input NAND gates which are capable of transforming slowly changing input signals into sharply defined, jitter−free output signals. In addition, they have greater noise margin than conventional NAND gates.

DM7442A

Abstract: DM7442AN MS-001 N16E
Contextual Info: Revised July 2001 DM7442A BCD to Decimal Decoder General Description Features These BCD-to-decimal decoders consist of eight inverters and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of input logic

DM74145N

Abstract: DM54 DM54145J DM54145W DM74145 J16A N16E W16A
Contextual Info: DM74145 BCD to Decimal Decoders/Drivers General Description Features These BCD-to-decimal decoders/drivers consist of eight inverters and ten, four-input NAND gates. The inverters are connected in pairs to make BCD input data available for decoding by the NAND gates. Full decoding of BCD input logic

74F132

Abstract: 74F132SC 74F132SJ F132 M14A M14D
Contextual Info: 74F132 Quad 2-Input NAND Schmitt Trigger tm General Description The F132 contains four 2-input NAND gates which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitterfree output signals. In addition, they have a greater noise

74AC00

Abstract: 74ACT00 74AC00SC equivalent 74AC00MTC 74AC00PC 74AC00SC 74AC00SJ 74ACT00SC 74ACT00SJ
Contextual Info: Revised December 1998 74AC00 • 74ACT00 Quad 2-Input NAND Gate General Description Features The AC/ACT00 contains four 2-input NAND gates. • ICC reduced by 50% ■ Outputs source/sink 24 mA ■ ACT00 has TTL-compatible inputs Ordering Code: Order Number

74LS00 pinout

Abstract: GD74HC00 pin configuration logic symbol 74LS00 logic symbol 74LS00 74HC00 5V 74HC00 74hc00 and gates TTL 74HC00 74HC GD54HC00
Contextual Info: GDS4/74HC00, GD54/74HCT00 QUAD 2-INPUT NAND GATES General Description These devices are identical in pinout to the 54/74LS 00. They contain four independent 2-input NAND gates. These devices are characterized for operation over wide temperature ranges to meet in­

54AC00

Abstract: 54ACT00 AC00
Contextual Info: 54AC00 • 54ACT00 Quad 2-Input NAND Gate General Description The ’AC/’ACT00 contains four 2-input NAND gates. Features n Outputs source/sink 24 mA n ’ACT00 has TTL-compatible inputs n Standard Microcircuit Drawing SMD — ’AC00: 5962-87549 — ’ACT00: 5962-87699

ECL IC NAND

Abstract: CXB1101Q 3 input nand gate 16 pin ic logic gate diagram of ic quad nand gate 16 pin ic
Contextual Info: CXB1101Q SO N Y Quad 3 - Input AND/NAND Gate Preliminary Package Outline Description CXB1101Q is an ultra high speed bipolar monolithic IC, which contains four 3-input AND/ NAND gates. I/O levels are ECL 100K compatible. This IC can be suitably applied to Ultra high

Contextual Info: Revised September 2001 74ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V.

Contextual Info: LS TTL DN74LS Series DN74LS00 DN74LS00 D10741£<pf Quad 2-input P ositive NAND Gates • Description P-1 DN74LS00 Contains four 2-input positive isolation NAND gate circuits. ■ Features • Low power consumption Pd = 8mW typical • High speed (tp(j = 9.5ns typical)

74ALVC00

Abstract: 74ALVC00M 74ALVC00MTC M14A MTC14
Contextual Info: Revised October 2001 74ALVC00 Low Voltage Quad 2-Input NAND Gate with 3.6V Tolerant Inputs and Outputs General Description Features The ALVC00 contains four 2-input NAND gates. This product is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V.

74LCX00

Abstract: 74LCX00BQX 74LCX00M 74LCX00MTC 74LCX00MTCX 74LCX00MX 74LCX00SJ M14A M14D
Contextual Info: Revised January 2005 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs General Description Features The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. • 5V tolerant inputs

54AC20

Abstract: 74AC AC20 E20A J14A
Contextual Info: 54AC20 Dual 4-Input NAND Gate General Description The ’AC20 contains four 4-input NAND gates. n Outputs source/sink 24 mA n Standard Military Drawing SMD n ’AC20: 5962-87613 Features n ICC reduced by 50% Logic Symbol IEEE/IEC DS100264-1 Pin Names Description