FLIP-FLOP 948 Search Results

QN8035

Abstract: 74F174SJ
Contextual Info: 54F174 54F174 Hex D Flip-Flop with Master Reset Literature Number: SNOS162A 54F 74F174 Hex D Flip-Flop with Master Reset General Description Features The ’F174 is a high-speed hex D flip-flop The device is used primarily as a 6-bit edge-triggered storage register

HEL35

Abstract: MC100EL35 KL35 MC10EL35 KEL35 transistor k 4110
Contextual Info: MC10EL35, MC100EL35 5V ECL JK Flip-Flop Description The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition

MC100EP35

Contextual Info: MC10EP35, MC100EP35 3.3V / 5VĄECL JK Flip Flop The MC10/100EP35 is a higher speed/low voltage version of the EL35 JK flip flop. The J/K data enters the master portion of the flip flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is

HEL35

Abstract: KEL35 KL35 MC100EL35
Contextual Info: MC10EL35, MC100EL35 5V ECL JK Flip-Flop The MC10EL/100EL35 is a high speed JK flip-flop. The J/K data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The reset pin is asynchronous and is activated with a logic

KVL51

Abstract: MC100LVEL51 transistor marking PB
Contextual Info: MC100LVEL51 3.3V ECL Differential Clock D Flip-Flop Description The MC100LVEL51 is a differential clock D flip-flop with reset. The device is functionally equivalent to the EL51 device, but operates from a 3.3 V supply. With propagation delays and output transition times

KEL52

Abstract: hel52 TRANSISTOR bd 657 KL52
Contextual Info: MC10EL52, MC100EL52 5V ECL Differential Data and Clock D Flip-Flop The MC10EL/100EL52 is a differential data, differential clock D flip-flop with reset. The device is functionally equivalent to the E452 device with higher performance capabilities. With propagation delays and

KVL51

Contextual Info: MC100LVEL51 3.3V ECL Differential Clock D Flip-Flop The MC100LVEL51 is a differential clock D flip-flop with reset. The device is functionally equivalent to the EL51 device, but operates from a 3.3 V supply. With propagation delays and output transition times

Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA Dual D-Type Flip-Flop with Set and Clear MC74LVX74 With 5V-Tolerant Inputs LVX The MC74LVX74 is an advanced high speed CMOS D -type flip-flop. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems

transistor BD 2420

Abstract: KVL31
Contextual Info: MC100LVEL31 3.3V ECL D Flip-Flop with Set and Reset The MC100LVEL31 is a D flip-flop with set and reset. The device is functionally equivalent to the EL31 device but operates from a 3.3 V supply. With propagation delays and output transition times essentially

Contextual Info: MOTOROLA O rder th is docum ent by MC74LVX574/D SEMICONDUCTOR TECHNICAL DATA Octal D-iype Flip-Flop with 3-State Outputs MC74LVX574 The MC74LVX574 is an advanced high speed CMOS octal flip-flop with 3-state outputs. The inputs tolerate voltages up to 7V, allowing the

MC100LVEL31

Contextual Info: MC100LVEL31 3.3V ECL D Flip-Flop with Set and Reset Description The MC100LVEL31 is a D flip-flop with set and reset. The device is functionally equivalent to the EL31 device but operates from a 3.3 V supply. With propagation delays and output transition times essentially

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low -V oltage Q uiet CMOS O ctal D-Type Flip-Flop M C74LVQ374 LVQ 3 -S ta te , N on-Inverting The MC74LVQ374 is a high performance, non-inverting octal D-type flip-flop operating from a 2.7 to 3.6V supply. The MC74LVQ374 is

DTL 9157

Abstract: DTL 950 5 input nand gate dtl DTL Fairchild 937 949 dtl 5 input nand gate DTL Fairchild DTL Fairchild 9109 936 dtl
Contextual Info: FAIRCHILD DIGITAL DTL DTL MICROLOGIC It m Cont’d DEVICE NO. Description Logic/Connection Diagram Packag (s) 1 948 RS Flip-Flop G18 3I,5F,6A,9A 2 949 Quad 2-Input NAND Gate G10 3I,5F,6A,9A 3 950 A-C Coupled RS Flip-Flop G19 3I,5F,6A,9A 4 951 Monostable Multivibrator

KEL51

Abstract: HEL51
Contextual Info: MC10EL51, MC100EL51 5V ECL Differential Clock D Flip-Flop The MC10EL/100EL51 is a differential clock D flip-flop with reset. The device is functionally similar to the E151 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E151 the EL51 is ideally

HEL31

Abstract: KEL31 MC10EL31MNR4 AN1504 E131 MC100EL31 MC10EL31
Contextual Info: MC10EL31, MC100EL31 5 V ECL D Flip-Flop With Set and Reset The MC10EL/100EL31 is a D flip-flop with set and reset. The device is functionally equivalent to the E131 device with higher performance capabilities. With propagation delays and output transition times significantly faster than the E131, the EL31 is ideally

RS flip-flop

Abstract: 951 Monostable Multivibrator micrologic rs-flip-flop nand gate DTL Fairchild "power nand gate" 937 fairchild logic gate nand flip-flop 948
Contextual Info: FAIRCHILD DIGITAL - DTL DTL MICROLOGIC Item Cont’d Description DEVICE NO. Logic/Connection Diagram Package(s) 1 948 RS Flip-Flop G18

dtt 7

Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA O ctal D-Type Flip-Flop w ith 3 -S ta te O utputs M C 74LVX374 W ith 5V-Tolerant In p u ts LVX The MC74LVX374 is an advanced high speed CMOS octal D -type flip -flop with 3-state outputs. The inputs tolerate voltages up to 7V,

54F174DM

Abstract: 54F174FM 54F174LM 74F174 74F174PC 74F174SC 74F174SJ J16A N16E f174
Contextual Info: 54F 74F174 Hex D Flip-Flop with Master Reset General Description Features The ’F174 is a high-speed hex D flip-flop The device is used primarily as a 6-bit edge-triggered storage register The information on the D inputs is transferred to storage during the LOW-to-HIGH clock transition The device has a

MC74ac273

Abstract: ACT273 MC*ac273 MC74AC373
Contextual Info: MC74AC273, MC74ACT273 Octal D Flip-Flop The MC74AC273/74ACT273 has eight edge-triggered D−type flip−flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip−flops simultaneously.

MC74AC273

Abstract: MC74AC373 ACT273 MC74AC273DW MC74AC273N MC74AC374 MC74AC377 MC74ACT273 MC74ACT273N 74AC273
Contextual Info: MC74AC273, MC74ACT273 Octal D Flip-Flop The MC74AC273/74ACT273 has eight edge-triggered D–type flip–flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip–flops simultaneously.

MC74AC374

Abstract: MC74AC273 MC74AC373
Contextual Info: MC74AC374, MC74ACT374 Octal D-Type Flip-Flop with 3-State Outputs The MC74AC374/74ACT374 is a high−speed, low−power octal D−type flip−flop featuring separate D−type inputs for each flip−flop and 3−state outputs for bus−oriented applications. A buffered Clock

MC74AC273

Abstract: MC74AC373 MC74ACT374 ACT374 MC74AC374 MC74AC374N MC74AC377 MC74AC564 MC74AC574
Contextual Info: MC74AC374, MC74ACT374 Octal D-Type Flip-Flop with 3-State Outputs The MC74AC374/74ACT374 is a high–speed, low–power octal D–type flip–flop featuring separate D–type inputs for each flip–flop and 3–state outputs for bus–oriented applications. A buffered Clock

CP-8-10

Contextual Info: M OTOROLA SEMICONDUCTOR TECHNICAL DATA O ctal D-Type Flip-Flop w ith 3 -S ta te Output M C 74VH C T574A The M C74VHCT574A is an advanced high speed CMOS octal flip-flop with 3 -s ta te output fabricated with silicon gate C M O S technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL

Contextual Info: MC14013B Dual Type D Flip-Flop The MC14013B dual type D flip−flop is constructed with MOS P−channel and N−channel enhancement mode devices in a single monolithic structure. Each flip−flop has independent Data, D , Direct Set, (S), Direct Reset, (R), and Clock (C) inputs and complementary