FIRST Search Results

IR 30 D1

Contextual Info: SN74ALS236 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107A-OCTOBER 1986 - REVISED SEPTEMBER 1993 Asynchronous Operation Organized as 64 Words by 4 Bits DW OR N PACKAGE TOP VIEW r NC [ 1 Data Rates From 0 to 30 MHz 3-State Outputs 16 J VCC 15 ] S O

Contextual Info: SN74ALS233B 16x5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS253 - MARCH 1990 - REVISED JUNE 1992 • Independent Asychronous Inputs and Outputs DW OR N PACKAGE TOP VIEW • 16 Words by 5 Bits OE [ 1 FULL-1 [ 2 • Data Rates From 0 to 40 MHz • Fall-Through Ti me. . . 14 ns Typ

74ALS234

Contextual Info: SN54ALS234, SN74ALS234 64 x 4 ASYNCHRONOUS FIRST-IN FIRST OUT MEMORY 0 2 9 5 8 , OCTOBER 1 9 8 6 Asynchronous Operation S N 54A LS 234 . . . J PACKAGE S N 74A LS 234 . . . 0 OR N PACKAGE Organized as 6 4 Words of 4 Bits Management Products TOP VIEW! Data Rates from 0 to 30 MHz

Contextual Info: S N 5 4 A LS 2 2 9 A , S N 7 4 A LS 2 2 9 A 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 . M A R C H 1 9 8 6 -R E V IS E D M A Y 1 9 8 6 • Independent Asychronous Inputs and Outputs • 16 Words by 5 Bits Each • Data Rates from 0 to 30 MHz

Contextual Info: SN74ALS232B 1 6 x 4 ASYNCHRONOUS FIRST IN, FIRST OUT MEMORY D3247 • Independent Asynchronous Inputs and Outputs DW OR N PACKAGE Package Options Include Plastic "Sm all O utline" Packages, Plastic Chip Carriers, and Standard Plastic 300-m il DIPs OE C TOP VIEW

Q7910

Abstract: SN74ALS2232A
Contextual Info: SN74ALS2232A 64 x 8 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORY D3091, F E B R U A R Y 1988 - R E V IS E D M A R C H 1990 Independent Asynchronous Inputs and Outputs NT PA C K A G E ITO P VIEW [ DOC D1 C D2C D3C 64 Words by 8 Bits rst Data Rates from 0 to 40 MHz

CT 2048

Abstract: D8228
Contextual Info: SN74ACT7203L, SN74ACT7204L, SN74ACT7205L, SN74ACT7206L 2048 x 9,4096 x 9,8192 x 9,16384 x9 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES SCAS226A - FEBRUARY 1993 - REVISED SEPTEMBER 1995 Reads and Writes Can Be Asynchronous or Coincident Organization: - SN74ACT7203L - 2048 x 9

74ALS233

Contextual Info: S N 5 4 A LS 2 3 3 A , S N 7 4 A LS 2 3 3 A 1 6 x 5 ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 . JA N U A R Y 1 9 8 6 - Package Options Include Plastic "Small Outline" Packages. Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs S N 54A LS 233A . . . J PACKAGE

Contextual Info: SN74ACT7881 1024 x 18 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCAS227C - FEBRUARY 1993 - REVISED FEBRUARY 1996 • Member of the Texas Instruments Wldebus Family • Independent Asynchronous Inputs and Outputs • Input-Ready, Output-Ready, and Half-Full Flags

Contextual Info: SN74ALS229B 16 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SPAS09Q - MARCH 1990 - REVISED JUNE 1992 • Independent Asychronous Inputs and Outputs • 16 Words by 5 Bits • Data Rates From 0 to 40 MHz • Fall-Through Time. . . 14 ns "typ • 3-State Outputs

Contextual Info: SN74ACT2235 1024x9x2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN, FIRST-OUT MEMORY SCAS148E - DECEMBER 1990 - REVISED APRIL 1998 • Independent Asynchronous Inputs and Outputs • Access Times of 25 ns With a 50-pF Load • Data Rates up to 50 MHz • Low-Power Advanced CMOS Technology

Contextual Info: SN74ALS236 64x4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SDAS107C - OCTOBER 1986 - REVISED APRIL 1998 DW OR N PACKAGE TOP VIEW • Asynchronous Operation • Organized as 64 Words by 4 Bits • Data Rates up to 30 MHz • 3-State Outputs • Package Options Include Plastic

74als2238

Contextual Info: SN74ALS2238 32 x 9 x 2 ASYNCHRONOUS BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY D3501, A P R IL 1990 N PACKAQE TOP VIEW Independent Asychronous Input« and Outputs Bidirectional RSTK 32 Word« by 9 BK. Each * Data Rate« from 0 to 40 MHz * F a ll-T h ro u g h T im e . . . 2 2 n « iy p

Contextual Info: SN54ALS232A, SN74ALS232A 16 X ASYNCHRONOUS FIRST-IN FIRST-OUT MEMORIES D 2 8 7 6 , OCTOBER 1 9 8 5 - • Independent A sy n c h ro n o u s Inputs and O u tp u ts • Package O ption s Include P lastic "S m a ll O u tlin e " Packages, C eram ic C hip Carriers,

Contextual Info: SN74ALS234 64 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SPASI 06B - 0C T 08E R 1986 - REVISED SEPTEMBER 1993 • • • • • Asynchronous Operation Organized as 64 Words by 4 Bits Data Rates From 0 to 30 MHz 3-State Outputs Package Options Include Plastic

2DR4

Contextual Info: SN74ALS232B 16 x 4 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY SCAS251 - FEBRUARY 1988 - R EVISED SEPTEM BER 1993 • Independent Asynchronous Inputs and Outputs • 16 Words by 4 Bits • Data Rates From 0 to 40 MHz e Fall-Through Time. 14 ns Typ • 3-State Outputs

211 ih

Contextual Info: SN74ALS2233A 64 x 9 ASYNCHRONOUS FIRST IN. FIRST-OUT MEMORY 0 3 0 9 2 , FEBRUARY 1 9 8 8 -R E V IS E D M AR C H 1 9 9 0 • Independent Asynchronous Inputs and Outputs • 64 Words By 9 Bits • Data Rates From 0 to 40 MHz • Fall-Through Time . . . 20 ns Typical

Contextual Info: SN74ALS235 64 x 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY _ SQAS108A - OCTOBER 1986 - REVISED SEPTEMBER 1993 • • • • • Asynchronous Operation Organized as 64 Words by 5 Bits Data Rates From 0 to 25 MHz 3-State Outputs

Contextual Info: TEXAS INSTR A S I C / M E M O R Y b4E D • 8^1725 ODflEbCH 3 3b M J I SN74ABT7816 64 X 36 X 2 CLOCKED FIRST-IN, FIRST-OUT MEMORY SCBS129-JULY1992 Free-Running CLKA and CLKB May Be Asynchronous or Coincident Two Independent 64 x 36 Clocked FIFOs Buffering Data in Opposite Directions

Contextual Info: _4_ In order to understand the fu n ction o f the C 2 M O S , let us first lo o k at the typ ical C2M O S inverter circu it. F igu re 4-1 sh o w s the b asic cir­ cuitry o f a C 2M O S inverter. T h e P -ch an n el e n ­ han cem en t M O S F E T norm ally o ff and the N ch an n el en h a n cem en t M O S F E T share a c o m ­

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A - AUGUST 1995 - REVISED APRIL 1998 • Free-Running CLKA and CLKB Can Be Asynchronous or Coincident • Output-Ready and Almost-Empty Flags Synchronized by CLKB • Clocked FIFO Buffering Data From Port A

ka band high power fet amplifier schematic

Contextual Info: 0.25-µm mmW pHEMT 2MI Process Data Sheet 4.6 µm PLATING CAP TOP PLATE 2000 Å NITRIDE 0.75 µm FIRST METAL TaN RESISTOR T-GATE ACTIVE REGION OHMIC METAL EXCEPT VIA SEMI-INSULATING GaAs SUBSTRATE VIA UNDER CAP 0.25-µm 2MI Process Cross Section General Description

Contextual Info: SN54ACT3641 1024 x 36 CLOCKED FIRST-IN, FIRST-OUT MEMORY SGBS309A – AUGUST 1995 – REVISED APRIL 1998 D D D D D D D D Free-Running CLKA and CLKB Can Be Asynchronous or Coincident Clocked FIFO Buffering Data From Port A to Port B Memory Size: 1024 × 36

Contextual Info: 8 Bit Microcontroller TLCS-870/X Series TMP88CH41UG Revision History Date Revision 2007/7/24 1 First Release Table of Contents TMP88CH41UG 1.1 1.2 1.3 1.4 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .