FCTD16C Search Results

TA138

Abstract: A1240XL 32 Bit loadable counter 2 bit magnitude comparator 176-CPGA "alu 4 bit" IC LM 384 gn
Contextual Info: Æ ic t â 1200XL Field Programmable Gate Arrays Features • Up to 8000 Gate Array Gates 20,000 PLD equivalent gates Datapath Performance at 135 MHz • Replaces up to 200 TTL Packages 10 ns Clock-Out speeds • Replaces up to eighty 20-Pin PAL Packages

equivalent of transistor tt 2148

Abstract: equivalent of transistor tt 2146 equivalent for transistor tt 2146 transistor TT 2146 TT 2146 M4 A4 TPC1280 TT 2146 M4 D3 TRANSISTOR TT 2158 TT 2146 M4 G4 str z 2154
Contextual Info: TPC12 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS SRFS002C - D3963, DECEMBER 1991 - REVISED FEBRUARY 1993 • Three Arrays With Increased Densities • Up to 8000 Equivalent Gate Array Gates • • Supported by Tl Action Logic System TI-ALS Software •

TA138

Abstract: TA280 3SB24 TA1225A 176-CPGA dece2x4
Contextual Info: ACTEL CORP Æ Ic M b?E » I • 01^24^ DDDGÔ33 TS1 ■ ACT ACT 2 Field Programmable Gate Arrays Features Description • The ACT™ 2 family represents Actel’s second generation of field programmable gate arrays FPGAs . The ACT 2 family presents a two-module architecture, consisting of C-modules and S-modules.

2 bit magnitude comparator

Abstract: dece2x4 TA194 TA688 4 bit identity comparator AO11 TA164 2-bit down counter TA161 DLM8
Contextual Info: Accelerator Series Macro Library – Tables of Hard, Soft, and TTL Macros Hard Macros—Combinatorial Modules Function Macro Description Combinatorial Logic Module CM8 Combinational Module Full ACT 3 Logic Module Sequential Logic Module DFM8A 4-bit D-Type Flip-Flop with Multiplexed Data, active low Clear, and active

Contextual Info: h /99, æ & c M ! ACT 3 Field Programmable Gate Arrays Features Preliminary Description 10 ns Clock-to-Output Times The ACT 3 family, based on Actel’s proprietary PLICE antifuse technology and 0.8-micron double-metal, double-poly CMOS process, offers a high-performance programmable solution

100CPGA

Contextual Info: ACT 2 Field Programmable Gate Arrays F e a tu re s • Up to 8000 Gate Array Gates 20,000 PLD equivalent gates • Datapath Performance at 105 MHz • Replaces up to 200 TTL Packages • Replaces up to eighty 20-Pin PAL Packages • Two In-Circuit Diagnostic Probe Pins Support Speed

TA688

Abstract: 7input and gate ao1b AO11 TA164 TA-191 TA153 TA190 DLM8 TA273
Contextual Info: Integrator Series Macro Library – Tables of Hard, Soft, and TTL Macros Hard Macros—Combinatorial Modules Function Macro Description Combinatorial Logic Module CM8 Combinational Module Full 1200XL and 3200DX Logic Module Sequential Logic Module DFM7A

A02E transistor

Abstract: 176-CPGA A1225A 100VQFP four channel decoder A1225 A1240A A1280 A1280A VKS FPGA CQFP 172
Contextual Info: Æ â C ti f A C r M2 Field Programmable Gate Arrays Features • Up to 8000 Gate Array Gates 20,000 PLD equivalent gates Datapath Performance at 105 MHz 16-Bit Accumulator Performance to 39 MHz • Replaces up to 200 TTL Packages • Replaces up to eighty 20-Pin PAL Packages

1225XL

Abstract: A1240XL LM 7447
Contextual Info: Prelim inary 1200X L Field Program m able G ate Arrays Features Description • The 1200XL family, Actel’s fourth family of field programmable gate arrays FPGAs , is targeted as a V A L U E family, offering very low costs and mid-to-high range performance. The 1200XL family

DA1225A

Abstract: diode SD1 03c
Contextual Info: Ic M ACTM2 Field Programmable Gate Arrays Features • Up to 8000 Gate Array Gates 20,000 PLD equivalent gates Datapath Performance at 105 MHz • Replaces up to 200 TTL Packages 16-Bit Accumulator Performance to 39 MHz • Replaces up to eighty 20-Pin PAL Packages

3200DX

Abstract: FCTD16C TA191 CNT4A AO11 TA273 dece2x4
Contextual Info: Macro Library Guide 1995 This document was created with FrameMaker 4.0.2 Actel Corporation, Sunnyvale, CA 94086  1995 Actel Corporation. All rights reserved. Part Number: 5029009-0 September 1995 No part of this document may be copied or reproduced in any form or by any means

MXT 276

Contextual Info: Æ te lê l ACT" 3 3.3 Volt Field Programmable Gate Arrays • Features • 3.3V Functionality fully compliant with JEDEC specifications • Highly Predictable Performance with 100% Automatic Placement and Routing • 13 ns Clock-to-Output Times • Up to 100 MHz On-Chip Performance

pioneer PAL 005 A

Abstract: K1603 FPGA 144 CPGA 172 PLCC ASIC VKS FPGA CQFP 106 8-bit interfacing ic 7447 AVNET uto 512 of 16-1 multiplexer BPW 40 pin connection in circuit
Contextual Info: ACTLSOOl ACT 3 Field Programmable Gate Arrays Features Description • The ACT 3 family, based on Actel’s proprietary PLICE antifuse technology and 0.8-micron double-metal, double-poly CMOS process, offers a high-performance programmable solution capable of 167 MHz on-chip performance and 7.5 nanosecond

Contextual Info: ACT 3 3.3 Volt Field Programmable Gate Arrays F eatu res • 3.3V Functionality specifications fully compliant with JEDEC Replaces up to 250 TTL Packages Replaces up to 100 20-pin PAL Packages • Highly Predictable Performance with 100% Automatic Placement and Routing

Contextual Info: ACT 3 Field Programmable Gate Arrays Preliminary Features Description • The ACT 3 family, based on Actel’s proprietary PLICE antifuse technology and 0.8-micron double-metal, double-poly CMOS process, offers a high-performance programmable solution

abb timer stt 17 s

Abstract: abb timer stt 11 ABB STT 117 L DN24b MXT 276 ABB STT 111 ABB STT 111 manual 4-bit even parity checker circuit diagram XOR CCTV DISTRIBUTION NETWORK diagram pra 1122
Contextual Info: ACTEL CORP Æ 9 cM ! b?E D • D lT E M Tb DDDGflflD ACT 3 Field Programmable Gate Arrays f l 7 fl ■ ACT Preliminary Features Description • The ACT 3 family, based on A del’s proprietary PLICE antifuse technology and 0.8-micron double-metal, double-poly CMOS

ty 95 camping

Abstract: TPC1240
Contextual Info: TPC12 SERIES CMOS FIELD-PROGRAMMABLE GATE ARRAYS SRFS002C - D3963, DECEMBER 1991 - REVISED FEBRUARY 1993 Three Arrays With Increased Densities • Enhanced Architecture - Supports Single-Module Sequential Functions - Supports Wide-Input Combinatorial Functions

nd25d

Abstract: 090b5
Contextual Info: ic M I NEW! - 3 S peeds • ■ ■ -w ACT 3 Field Programmable Gate Arrays F e a tu re s • Highly Predictable Perform ance with 100% Automatic Placem ent and Routing • 7.5 ns Clock-to-Output Times • Up to 250 MHz On-Chip Perform ance • Up to 228 User-Programmable I/O Pins