FCT273 Search Results

Contextual Info: IDT54/FCT273T/AT/CT FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET MILITARY AND COMMERCIAL TEMPERATURE RANGES FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET IDT54/FCT273T/AT/CT FEATURES: DESCRIPTION: − − − − − The FCT273T/AT/CT are octal D flip-flops built using an advanced dual

FCT273T

Contextual Info: IDT54/FCT273T/AT/CT FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET IDT54/FCT273T/AT/CT FEATURES: DESCRIPTION: − − − − The FCT273T is an octal D flip-flop built using an advanced dual metal

74FCT273CT

Contextual Info: IDT54/FCT273T/AT/CT FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET DESCRIPTION: FEATURES: • • • • • • • • • IDT54/FCT273T/AT/CT The FCT273T is an octal D flip-flop built using an advanced dual metal

dj C

Contextual Info: 273A National ÆM Semiconductor ADVANCE INFORMATION 54FCT/FCT273A Octal D Flip-Flop General Description Features The 'FCT273A has eight edge-triggered D-type flip-flops with individual D Inputs and Q outputs. The common buff­ ered Clock CP and Master Reset (MR) input load and re­

l273t

Abstract: 54FCT273a 74FCT273CT
Contextual Info: IDT54/FCT273T/AT/CT FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET IDT54/FCT273T/AT/CT FEATURES: DESCRIPTION: • • • • The FCT273T is an octal D flip-flop built using an advanced dual metal

74FCT273CT

Contextual Info: IDT54/FCT273T/AT/CT FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET DESCRIPTION: FEATURES: • • • • • • • • • IDT54/FCT273T/AT/CT The FCT273T is an octal D flip-flop built using an advanced dual metal

FCT273T

Abstract: 18cp5
Contextual Info: IDT54/FCT273T/AT/CT FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET MILITARY AND INDUSTRIAL TEMPERATURE RANGES FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET IDT54/FCT273T/AT/CT FEATURES: DESCRIPTION: − − − − The FCT273Tia an octal D flip-flop built using an advanced dual metal

Contextual Info: 273 EHSemiconductor National ä ä 54FCT/FCT273 Octal D Flip-Flop General Description Features The 'FCT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) input load and reset

74FCT273CT

Contextual Info: FAST CMOS OCTAL D FLIP-FLOP WITH MASTER RESET Integrated Device Technology, Inc. IDT54/74/FCT273T IDT54/FCT273AT IDT54/FCT273CT FEATURES: DESCRIPTION: • The IDT54/FCT273T/AT/CT are octal D flip-flops built using advanced CEMOS , a dual metal CMOS technology.

CY74FCT273ATQC

Abstract: CY74FCT273ATSOC FCT273T
Contextual Info: fax id: 7025 ; •- L> I 1 i l ì L O O JS / ^ i\ rszgggfpr CY54/FCT273T rT~lT~l T *o O 8-Bit Register Features Functional Description • Function, pinout, and drive com patible with FCT and F logic • FCT-C speed at 5.8 ns max. Com ’I FCT-A speed at 7.2 ns max. (Com ’I)

Contextual Info: FCT273T, FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 D D D D D description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP FCT273T . . . L PACKAGE TOP VIEW D1 Q1 Q2 D2 D3 Q7 D MR

54FCT377

Abstract: 54FCT377DMQB 54FCT377FMQB 54FCT377LMQB J20A W20A
Contextual Info: 54FCT377 Octal D-Type Flip-Flop with Clock Enable General Description The ’FCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.

CY54FCT273ATLMB

Abstract: CY74FCT273ATQC CY74FCT273ATSOC CY74FCT273CTSOC CY74FCT273TQC FCT273T
Contextual Info: fax id: 7025 1CY 54/7 FCT273 T CY54/FCT273T 8-Bit Register Features Functional Description • Function, pinout, and drive compatible with FCT and F logic • FCT-C speed at 5.8 ns max. Com’l FCT-A speed at 7.2 ns max. (Com’l) • Reduced VOH (typically = 3.3V) versions of equivalent

FCT273T

Contextual Info: CY54/FCT273T 8-BIT REGISTER CYPRESS FEATURES Logic Levels 64 mA Sink Current Com’l , 32 mA (Mil) 15 mA Source Current (Com’l), 12 mA (Mil) CMOS for Low-Power Consumption — Typically 1/3 of FAST Bipolar Logic Edge Triggered D Flip-Flops Buffered Common Clock

CP 022 ND

Contextual Info: Semiconductor FCT273 Octal D-Type Flip-Flop General Description Features The ’FCT273 has e ight edge-triggered D -type flip-flops with individual D inputs and Q o utp uts. The com m on buffered C lock CP and M aster R eset (MR) inputs load and reset

Contextual Info: FCT273T, FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 D D D D D description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP FCT273T . . . L PACKAGE TOP VIEW D1 Q1 Q2 D2 D3 Q7 D MR

Contextual Info: QS273T, 2273T Q High-Speed CMOS 8-Bit Register with Asynchronous Reset Q S54/FCT273T Q S54/74FCT2273T FEATURES/BENEFITS • Pin and function compatible to the 74F273 74FCT 273 and FCT273T • CMOS power levels: <7.5 mW static • Available in PDIP, ZIP, SOIC, QSOP, CERDIP

Contextual Info: PIONEER SEMICONDUCTOR FCT273T C O R P O R A T I O N 11111111•111111111111ii1111111ii11111111111111 ii 11111 111 Fast CMOS Octal D Flip-Flop with Master Reset Product Features: • FCT273T has the same speed and drive of Bipolar FAST " F ' series, at CM OS power levels.

54FCT377

Abstract: 54FCT377DMQB 54FCT377FMQB 54FCT377LMQB J20A W20A
Contextual Info: 54FCT377 Octal D-Type Flip-Flop with Clock Enable General Description Features The ’FCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP input loads all flip-flops simultaneously, when the

8111D

Abstract: A115-A C101 CY54FCT273T CY74FCT273T FCT273T FCT273A
Contextual Info: FCT273T, FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 D D D D D description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP FCT273T . . . L PACKAGE TOP VIEW D1 Q1 Q2 D2 D3 Q7 D MR

MIL-STD-833B

Abstract: 54FCT273 54FCT273DMQB 54FCT273FMQB 54FCT273LMQB J20A W20A
Contextual Info: FCT273 Octal D-Type Flip-Flop General Description Features The ’FCT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset (MR) inputs load and reset (clear) all flip-flops simultaneously.

Contextual Info: FCT273T, FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 D D D D D description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP FCT273T . . . L PACKAGE TOP VIEW D1 Q1 Q2 D2 D3 Q7 D MR

Contextual Info: fax id: 7025 p yXpX : v « *1 CY54/FCT273T - 8-Bit Register Features Functional Description • Function, pinout, and drive com patible with FCT and F logic • FCT-C speed at 5.8 ns max. Com ’ I FCT-A speed at 7.2 ns max. (Com ’ I) • Reduced V0H (typically = 3.3V) versions of equivalent

Contextual Info: FCT273T, FCT273T 8-BIT REGISTERS SCCS020A – MARCH 1995 – REVISED OCTOBER 2001 D D D D D description 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC Q7 D7 D6 Q6 Q5 D5 D4 Q4 CP FCT273T . . . L PACKAGE TOP VIEW D1 Q1 Q2 D2 D3 Q7 D MR