F1053 Search Results

F10132

Abstract: F10532
Contextual Info: F10132 • F10532 DUAL MULTIPLEXER/LATCH h QnnaratoT h F1° 132 and F10532 are dual m ultiplexers w ith D type latches !? S° lect and Reset i nP“ ts. Each latch may be enabled “ LOGIC SYMBOL In a b « f p 'u n n i fl*K ^ 0n Enable <Ec) in ,he LOW sta,e or bV using the

F10135

Abstract: F10535 fairchild ECL
Contextual Info: F10135~* F 1 0 5 3 5 ^ F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled Flip­ Flop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of

bcd counter using j-k flip flop diagram

Abstract: pn sequence generator using jk flip flop F10136 ECL Handbook
Contextual Info: / / / F10136 • F10536 • F10137 • F10537 V 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10136/F10536 and F10137/FI 0537 are 4-stage synchronous counters capable of operating at typical count rates of 250 MHz. The circuits are designed

12J2

Abstract: 1.2j2 F10535 F10135
Contextual Info: F10135^ F10535 F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled FlipFlop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of

Contextual Info: F10135 • F10535 F10K VOLTAGE COMPENSATED ECL DUAL JK FLIP-FLOP DESCRIPTION - The F10135 and F10535 are Dual Master/Slave DC Coupled FlipFlop. Asynchronous Clear Direct CD and Set Direct (SD) are provided and override the clock. The output states of each flip-flop change on the LOW to HIGH transition of

si117

Contextual Info: F10136 • F10536 • F10137 • F10537 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL DESCRIPTION - The F10136/F10536 and F10137/F10537 are 4-stage synchronous counters capable of operating at typical count rates ot 250 MHz. The circuits are designed

Contextual Info: b24TöEb QG2b524 \ rJ ftjhjjn.il. * M F1053S-2 F1053S FOR DIGITAL MOBILE TELEPHONE, Rx FEATURES 1. SMD package insures small size, lightweight. 2. Adjustment free. 3. High stop band attenuation and low insertion loss. 4. Wide and sharp passband characteristics.

F10130

Abstract: F10530
Contextual Info: F10130 • F10530 DUAL D LATCH DESCRIPTION - The F10130/F10530 contains_a pair of D type latches with a Common Enable Ec input. Each latch has its own Enable (En), Set (S) and ResetJR) inputs. For each latch, the data present on the D input appears on the Q output when both En and Ec are LOW,

F10133

Abstract: F10533
Contextual Info: F10133 • F10533 QUAD LATCH DESCRIPTION — The F10133 and F10533 are high-speed low power Quad Latches consisting of four bistable latch circuits with D type inputs and gated outputs. Open em itters allow a large number of o utputs to be wired-OR together and latch

Contextual Info: F 10134^» F10534^ DUAL MULTIPLEXER/LATCH DESCRIPTIO N — The F10134 and F10534 are Dual Multiplexers with D type latches. Each latch may be enabled separately by holding the Common Enable in the LOW state and using the Enable En inputs. If the Com mon Enable (Ec) is used to enable the latch,

fairchild ECL

Abstract: F10137 F10136 F10536 F10537 ECL Handbook 125-250MHz
Contextual Info: F10136^ F10536 • F10137 • F10537 V 4-STAGE UP/DOWN COUNTERS F10K VOLTAGE COMPENSATED ECL D ESCRIPTIO N - The F10136/F10536 and F10137/F10537 are 4-stage synchronous counters capable o f operating at typical count rates of 250 MHz. The circuits are designed

logic diagram

Abstract: F10134 F10534
Contextual Info: F 1 0 1 3 4 ^ F 1 0 5 3 4 ^ DUAL MULTIPLEXER/LATCH DESCRIPTION — The F10134 and F10534 are Dual Multiplexers with D type latches. Each latch may be enabled separately by holding the Common Enable in the LOW state and^jsing the Enable En inputs. If the Common Enable (E c ) is used to enable the latch

Contextual Info: / l/ F10132 • F10532 DUAL MULTIPLEXER/LATCH DESCRIPTION — The F10132 and F10532 are dual multiplexers with D type latches and have common Data Select and Reset _[nputs. Each latch may be enabled separatejy by holding the Common Enable Ec In the LOW state or by using the

743 LEM

Contextual Info: F10131 • F10531 HIGH SPEED DUAL D FLIP-FLOP DESCRIPTION - The F10131/F10531 contains two master/slave D-type flip-flops. The internal clock is the O R of two dock inputs, one common to both flip-flops. The O B clock permits the use of one input as a clock pulse and the other as an active LO W enable. While the

Contextual Info: F10133 • F10533 QUAD LATCH DESCRIPTION — The F10133 and F10533 are high-speed low power Quad Latches consisting of four bistable latch circuits with D type inputs and gated outputs. Open em itters a llow a large number of o utputs to be wired-OR together and latch

Contextual Info: F10130* F10530 DUAL D LATCH DESCRIPTION - The F10130/F10530 contains_a pair of D type latches with a Common Enable Ec input. Each latch has its own Enable (En), S et (S) and ResetJR ) inputs. For each latch, the data present on the D input appears on the Q output when both En and Ec are LOW,

Contextual Info: F10132 • F10532 DUAL MULTIPLEXER/LATCH DESCRIPTION — The F10132 and F10532 are dual multiplexers with D type latches and have common Data Select and Reset Jnputs. Each latch may be enabled separately by holding the Common Enable Ec in the LOW state or by using the

U214D

Contextual Info: F 1 0 1 3 1 ^ F 1 0 5 3 1 ^ HIGH SPEED DUAL D FLIP-FLOP DESCRIPTION - The F10131/F10531 contains two master/slave D-type flip-flops. The internal clock is the OR of two clock inputs, one common to both flip-flops. The OR clock permits the use of one input as a clock pulse and the other as an active LOW enable. While the

CPIE

Abstract: F10131 F10531 fairchild ECL
Contextual Info: F 10131^ F 10531 ^ HIGH SPEED DUAL D FLIP-FLOP DESCRIPTION - The F10131/F10531 contains two master/slave D-type flip-flops. The internal clock is the OR of two clock inputs, one common to both flip-flops. The OR clock permits the use of one input as a clock pulse and the other as an active LOW enable. While the

Contextual Info: POLYFET R F DEVICES StE D • 724100^ aGQ0031 T - T -39-A T POLYFET RF DEVICES F1053 General Description PATENTED GOLD METALIZED SILICON RF POWER MOSFET Silicon vertical DMOS designed specifically for RF applications. Immune to forward and reverse bias secondary breakdown.

Contextual Info: F10134 • F10534 DUAL MULTIPLEXER/LATCH DESCRIPTION— The F10134 and F10534 are Dual Multiplexers with D type latches. Each latch may be enabled separately by holding the Common Enable in the LOW state and using the Enable En inputs. If the Common Enable(Ec) is used to enable the latch,

LT 741 S

Contextual Info: F10130 • F10530 DUAL D LATCH DESCRIPTION - The F10130/F10530 contains_a pair of D type latches with a Common Enable Ec input. Each latch has its own Enable (En), Set (S) and Reset^R) inputs. For each latch, the data present on the D input appears on the Q output when both En and Ec are LOW,

MDD 1654

Abstract: TMT Isolator wr 90 x band flange waveguide teledyne yig oscillator 10GHz bandpass filter yig oscillator hp m7928 teledyne microwave mbg ferretec filtronic band-pass
Contextual Info: TELEDYNEMICROWAVE the complete microwave solution Table of Contents Company Profile. . . . . . . . . . . . . . . . . . . . . . . . . 5 Sub-Systems. . . . . . . . . . . . . . . . . . . . . . . . . . 7 Diplexers and Multiplexers. . . . . . . . . . . . . . . . . . . . . . . . . . 82

Gunn Diode

Abstract: Microwave Silicon Detector Diode DW9248 microwave waveguide Marconi gunn Silicon Detector UHF diode varactor diode filter varactor
Contextual Info: Product List TYPE No. DESCRIPTION DA1304 DA1307 MILLIMETRE WAVE BALANCED MIXER 34.0 to 34.4GHz BALANCED MIXER C & X BAND DOUBLE BALANCED MIXER C & X BAND DOUBLE BALANCED MIXER X & J BAND DOUBLE BALANCED MIXER X & J BAND DOUBLE BALANCED MIXER X & J BAND DOUBLE BALANCED MIXER