EPLD 5032 Search Results

MSI MS-5

Contextual Info: EPM 5032 EPLD Features H • ■ ■ ■ ■ High-speed, single-LAB MAX 5000 EPLD t PD as fast as 10 ns Counter frequencies up to 125 MHz Pipelined data rates up to 83 MHz 32 individually configurable macrocells 64 shareable expander product terms "expanders" allowing 68

EPM5032A

Abstract: MSI MS-5 EPM5032-25 EPM5032 EPM5032-15 EPM5032 max 0H22D ns288
Contextual Info: EPM 5032 EPLD Features 0005 XVIAI High-speed, single-LAB M AX 5000 EPLD t PD as fast as 10 ns Counter frequencies up to 125 MHz Pipelined data rates up to 83 MHz 32 individually configurable macrocells 64 shareable expander product terms "expanders" allowing 68

74151 PIN DIAGRAM

Abstract: 74151 22v10 5192JM CY7C340 PRODUCT CHANGE PALC22V10B programmer EPLD CY7C340 CY7C341B CY7C342B
Contextual Info: 40 EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase

C3402

Abstract: 74151 5128LC-1 74151 PIN DIAGRAM 5128LC-2 74151 8 to 1 74151 pin connection function of 74151 22V10-10C CY7C340
Contextual Info: EPLD CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDs Features • Erasable, user-configurable CMOS EPLDs capable of implementing high-density custom logic functions • 0.8-micron double-metal CMOS EPROM technology CY7C34X • Advanced 0.65-micron CMOS technology to increase

EPM5032

Abstract: 1PD2 EPM5032 max epm5032-15 EPM5032A Q421 MSI MS-5
Contextual Info: EPM5032 EPLD Features B • ■ ■ ■ MAX 5000 ■ High-speed, singie-LAB MAX 5000 EPLD t PD as fast as 10 ns Counter frequencies up to 125 MHz Pipelined data rates up to 83 MHz 32 individually configurable macrocells 64 shareable expander product terms "expanders" allowing 68

M5962

Abstract: ep 1810 program EP610 ORDERING 5032DM altera ep320 EPS448LC-25 EPM 5192 PLMD5032 J5192 EPS448
Contextual Info: Ordering EPLDs Figure 1 show s how an EPLD part num ber is constructed. For inform ation on specific package, grade, and speed com binations, refer to individual EPLD data sheets or the Product Selection Guide in this data book, or telephone the Altera M arketing D epartm ent at 408 984-2800.

50321

Contextual Info: EPM5032 EPLD Features □ □ □ □ □ □ ü H ig h -s p e e d 28 -p in DIP, J-lead, o r SOIC single-LA B MAX 5 0 0 0 EPLD C o m b in a to ria l s p e e d s w ith tPD = 15 ns C o u n t e r f re q u en c ies u p to 76 M H z P ipelined d a ta rates u p to 8 3 M H z

Contextual Info: CY7C340 EPLD Family 0 CYPRESS Multiple Array Matrix High-Density EPLDs — VHDL simulation ViewSim Features • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions • 0.8-micron double-metal CMOS EPROM technology (CY7C34X)

EPM5128JC

Abstract: EPM5064 EPM5130 Altera EPM5128 Altera September 1991
Contextual Info: ANU MPLDs Mask-Programmed Logic Devices September 1991, ver. 1 Data Sheet Features □ □ □ □ □ □ □ □ □ General Description M asked versions of EPLD designs Reduced cost for large-volum e applications A vailable for E P1810, EPM 5032, E PM 5064, EPM 5128, EPM 5130,

epm5032dc

Abstract: 5130Q 5128A 74151 waveform 7C340 epld 342B rc 74151
Contextual Info: CY7C340 EPLD Family •= CYPRESS Multiple Array Matrix High-Density EPLDs Features — VHDL sim ulation ViewSim M • Erasable, user-configurable CMOS EPLDs capable o f implementing highdensity custom logic functions — Available on PC and Sun platforms

74151 waveform

Abstract: CY7C340 5128LC 7C340 programming 7C340 CY7C341B CY7C342B CY7C344 CY7C346 FLASH370
Contextual Info: 7c340: 12-13-90 Revision: October 19, 1995 CY7C340 EPLD Family Multiple Array Matrix HighĆDensity EPLDs called expander product terms. These exĆ Ċ VHDL simulation ViewSimt Ċ Available on PC and Sun platforms panders are used and shared by the macroĆ

74151

Abstract: 74151 pin connection C3406 74151 PIN DIAGRAM 74151 waveform counter schematic diagram 74161 programmer EPLD 22v10 5192JM 74151 multiplexer
Contextual Info: 1CY 7C34 0 fax id: 6100 EPL D Family CY7C340 EPLD Family Multiple Array Matrix High-Density EPLDS Features tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. • Erasable, user-configurable CMOS EPLDs capable of

PLDS-MAX

Abstract: Altera Classic EPLDs Altera LP5 ALTERA MAX 5000 programming ALTERA MAX 5000 eps448 logicaps sam plus mpm5192 PLDS-ENCORE
Contextual Info: Index September 1991 A+PLUS design entry 301 design processing 303 EPLD programming 304 functional simulation 304 o verview 299 ABEL2MAX Converter 356 adapters sff P L E D /J /G /S /Q & P L M D /J /G /S /Q adapters ADP (see Altera Design Processor) AHDL (s«1 Altera Hardware Description Language)

5130G

Abstract: 5192G rc 74151 5192LC
Contextual Info: CY7C340 EPLD Family '# CYPRESS Features • E rasab le, u ser-con figu rab le C M O S E P L D s cap ab le o f im p lem en tin g h igh d en sity cu stom logic fu n ction s • 0.8'in icron d ou b le-m etal C M O S E P R O M tech n ology C Y 7C 34X • A dvanced 0.65-m icron C M O S

Altera EPM5128

Abstract: WKX 62 EPM5016 epm5130 pinouts for 7400 series EPM5064 EPM5192 program EPM5032 EPM5128 PACKAGING PLDS-MAX
Contextual Info: EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from fast 20-pin address decoders to 100-pin LSI custom peripherals.

EPM5130

Contextual Info: A L TE RA CORP □5*15372 0 0 D 2 1 4 2 4bT « A L T 47E D 'P f D - 0 l EPM5016 to EPM5192 EPLDs High-Speed, High-Density MAX 5000 Devices Data Sheet September 1991, ver. 2 Features □ □ □ □ □ □ Complete family of CMOS EPLDs solves design tasks ranging from

programming manual EPLD EPS448

Abstract: Altera EPM5128 EPM7064-12 leap u1 EP-900910 PLE3-12a tcl tv circuit altera eplds EP610 "pin compatible" ALTERA MAX 5000
Contextual Info: Data Book TENTH ANNIVERSARY A Decade of Leadership A u g u s t 1993 Data Book August 1993 A-DB-0793-01 Altera, MAX, and M A X+PLUS are registered trademarks of Altera Corporation. The following, among others, are trademarks of Altera Corporation: AHDL, M AX+PLUS II, PL-ASAP2, PLDS-HPS, PLS-ADV, PLS-ES, PLS-FLEX8, PLS-FLEX8/H P, PLS-FLEX8/SN , PLS-HPS, PLS-STD, PLS-W S/H P,

ALTERA MAX 5000

Abstract: EPM5016 jlcc 32 R program EPM5032 epm5128a ALTERA MAX 5000 programming
Contextual Info: M A X 5 0 00/EPS464 Programmable Logic Device Family Data Sheet August 1993, ver. 1 □ Features □ □ □ □ □ □ □ □ □ Advanced M ultiple Array M atrix MAX 5000/E P S464 architecture com bining speed and ease-of-use of PAL devices with density of

altera EP300

Abstract: EPM7128 EPLD ep330 mpm5192 MPM512 MPM5128 alternative bipolar transistors book
Contextual Info: M M r M p , 0 9 ra m m r .lv Data Sheet September 1991, ver. 2 Introduction 0 £ Programm able Logic Devices also described as P A L s , P L A s, F P L A s, PLD s, E P L D s , E E P L D s , LC A s, and F P G A s combine the logistical advantages of standard, fixed integrated circuits with the architectural flexibility of custom

25128LI

Abstract: 5130LC vhdl 74161 5128LC 5192LC
Contextual Info: fax id: 6100 p vXpX : v«*1 C Y 7 C 3 4 0 EP L D Fami l y - Multiple Array Matrix High-Density EPLDS tion of innovative architecture and state-of-the-art process, the MAX EPLDs offer LSI density without sacrificing speed. Feat ures • E r a s a b l e , u s e r - c o n f i g u r a b l e C M O S E P L D s c a p a b l e of

J-Lead, QFP ceramic

Abstract: IC 7400 SERIES book EPM 5192
Contextual Info: M A X 5000 Programmable Logic Device Family March 1995, ver. 2 Features. D a ta she et • ■ ■ ■ ■ ■ ■ Advanced M ultiple Array M atrix MAX 5000 architecture com bining speed and ease-of-use of PAL devices w ith density of program m able gate arrays

Date Code Formats Altera EPF10K

Abstract: ep22v10 5962-9061102XA 5962-8854901xa 8686401LA 5962-8686401LA lift controller in vhdl ALTERA PART MARKING EPM7160 EPX780 transistor b2020
Contextual Info: Introduction Contents March 1995 Introduction The PLD Advantages of Altera

D5032

Abstract: IC TTL 7400 free J1810 Altera LP5 PLDS-ENCORE plej5128
Contextual Info: PLDS-ENCORE MAX+PLUS, A+PLUS & SAM+PLUS Programmable Logic Development System Data Sheet September 1991, ver. 2 Contents □ □ □ □ □ General Description P L S -M A X — M A X + P L U S P ro g ra m m ab le Logic Softw are P L S - S U P R E M E — A + P L U S P ro g ra m m a b le L ogic Softw are

F1G21

Abstract: EPM5130
Contextual Info: M A X 5000 Programmable Logic Device Family June 1996, ver. 3 Fe a tu re s . Data Sheet • ■ ■ ■ ■ ■ ■ ■ A d v a n c e d M u ltip le A rra y M a trix MAX 5000 a rc h ite c tu re c o m b in in g sp e e d a n d ease-o f-u se o f PA L d ev ic e s w ith th e d e n s ity o f