EP2A15F672C7 Search Results

EP2A15F672C7 Datasheets (3)

Filter by Manufacturer

Altera

Part	ECAD Model	Manufacturer	Description	Datasheet Type	PDF	PDF Size	Page count
EP2A15F672C7		Altera	Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 492 I/O 672FBGA	Original	PDF		99
EP2A15F672C7AA		Altera	Integrated Circuits (ICs) - Embedded - FPGAs (Field Programmable Gate Array) - IC FPGA	Original	PDF	572.13KB
EP2A15F672C7N		Altera	Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 492 I/O 672FBGA	Original	PDF		99

EP2A15F672C7 Price and Stock

Filter by Manufacturer

Select Manufacturer


Altera Corporation EP2A15F672C7ES FPGA APEX IIFamily 600KGates 16640Cells 500MHz 1.5V 672-Pin FC-FBGA
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Bristol Electronics	EP2A15F672C7ES		4			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Altera Corporation EP2A15F672C7N FPGA APEX IIFamily 600KGates 16640Cells 500MHz 1.5V 672-Pin FC-FBGA Tray
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Bristol Electronics	EP2A15F672C7N		2			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Altera Corporation EP2A15F672C7 LOADABLE PLD, 1.69NS, CMOS, PBGA672
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Quest Components	EP2A15F672C7		3			1 $300.00 10 $280.00 100 $280.00 1000 $280.00 10000 $280.00	Buy Now
Component Electronics, Inc	EP2A15F672C7		1			1 $1384.62 10 $1384.62 100 $1038.46 1000 $900.00 10000 $900.00	Buy Now
Intel / Altera EP2A15F672C7N Loadable PLD, 1.69ns, CMOS, PBGA672
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	EP2A15F672C7N		3,723			1 - 10 - 100 - 1000 - 10000 -	Get Quote
Intel Corporation EP2A15F672C7 Loadable PLD, 1.69ns, CMOS, PBGA672
Distributors	Part	Package	Stock	Lead Time	Min Order Qty	Price	Buy
Vyrian	EP2A15F672C7		3,681			1 - 10 - 100 - 1000 - 10000 -	Get Quote

EP2A15F672C7 Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
vhdl coding for error correction and detection Abstract: vhdl code for 555 EP1S10F780C6 EP2A15F672C7 EP1K100QC208-1 vhdl 4 to 16 decoder 5 to 32 decoder using 3 to 8 decoder vhdl code Contextual Info: Reed-Solomon Compiler User Guide 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com Core Version: Document Version: Document Date: 3.3.0 3.3.0 March 2002 Reed-Solomon Compiler MegaCore Function User Guide Copyright  2002 Altera Corporation. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all	Original	vhdl coding for error correction and detection vhdl code for 555 ep1s10f780c6 ep2a15f672c7 +3ep1k100qc208-1 vhdl 4 to 16 decoder 5 to 32 decoder using 3 to 8 decoder vhdl code	PDF
ddr333 pc2700 memory Abstract: DDR266 DDR333 EP1C20F400 EP1C20F400C6 EP1S25F1020C6 EP1S25F780C6 EP2A15F672C7 PC2100 PC2700 Contextual Info: DDR SDRAM Controller MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com Core Version: Document Version: Document Date: 1.1.0 1.1.0 rev 1 February 2003 DDR SDRAM Controller MegaCore Function User Guide	Original	ddr333 pc2700 memory ddr266 ddr333 ep1c20f400 +6ep1c20f400c6 ep1s25f1020c6 ep1s25f780c6 ep2a15f672c7 pc2100 pc2700	PDF
EP1M120F484C5 Abstract: EP20K200EFC484-1X epm120f484 EP2A15F672C7 EP1K100FC484-1 EP20K200CF484C7 apex lcd EP20K200EFC4841X Contextual Info: Estimating Nios Resource Usage & Performance in Altera Devices September 2001, ver. 1.0 Introduction Application Note 178 The Excalibur Development Kit, featuring the Nios™ embedded processor, includes the software, hardware, accessories, and documentation necessary to create working embedded systems. Using the	Original	ep1m120f484c5 ep20k200efc484-1x epm120f484 ep2a15f672c7 +4ep1k100fc484-1 ep20k200cf484c7 apex lcd ep20k200efc4841x	PDF
CY7C1302V25-167 Abstract: l2 cache verilog code CY7C1302 EP2A15F672C7 l2 cache design in verilog code Contextual Info: QDR SRAM Controller Reference Design in APEX II Devices October 2001, ver. 2.0 Introduction Application Note 133 The explosive growth of the Internet has boosted the demand for highspeed data communications systems that require fast processors and high-speed interfaces to peripheral components. While the processors in	Original	cy7c1302v25-167 l2 cache verilog code cy7c1302 ep2a15f672c7 +1l2 cache design in verilog code	PDF
transmitter and receiver project with component Abstract: vhdl code for lvds receiver APEX20KE EP2A15F672C7 Altera ALTLVDS mapping mouse apex Contextual Info: White Paper Using APEX II Differential I/O Standards in the Quartus II Software Introduction The APEXTM II device high-speed interface includes four I/O banks, each of which is comprised of 18 channels, offering 36 differential input and 36 differential output channels, each running at up to 1 gigabit per second Gbps .	Original	366-gbps transmitter and receiver project with component vhdl code for lvds receiver apex20ke +3ep2a15f672c7 altera altlvds mapping mouse apex	PDF
AN-203 Abstract: EP2A15F672C7 SRAM controller Contextual Info: ZBT SRAM Controller Reference Design for APEX II Devices December 2001, ver. 1.0 Introduction Application Note 183 As communication systems require more low-latency, high-bandwidth interfaces for peripheral components, designs need high-throughput memory with efficient bus utilization. The previous generation of static	Original	an-203 ep2a15f672c7 sram controller	PDF
EP2A25F672 Contextual Info: Altera Part Number Anatomy Altera Homepage Altera Quicklinks Global Navigation Bar Second Level Navigation Bar Search Here GO Advanced Help SRAM PLDs APEX II APEX 20K Mercury FLEX 10K ACEX 1K FLEX 6000 Embedded Processors About Excalibur ARM-Based Nios Product-Term PLDs	Original	ep2a15b724c7es-7 ep2a15b724c9es-9 ep2a15f672c7es-7 ep2a15f672c9es-9 +7ep2a25 ep2a25b724c7es-7 ep2a25b724c9es-9 ep2a25f672c7es-7 ep2a25f672c9es-9 ep2a25f1020c7es-7 ep2a25f672	PDF