EM-323 STEP Search Results

Contextual Info: lowprofile ECL COMPATIBLE 6-BIT PROGRAMMABLE LOGIC DELAY LINE # ECL input and output levels # Delays stable-and precise # 48-pin DIP package .2 5 0 high # Available in delays up to 323ns # Available in 5 delay steps with resolution from 1 to 5ns # Propagation delays fully compensated

AUT64-algorithm

Abstract: IC-3130 E5560 Transponder ID 46 crypto Transponder ID 46
Contextual Info: Tem ic e5560 S e m i r o n d u r t o r s Standard Read/Write Crypto Identification IC Description The e5560 is a member of the TEMIC IDentification IC IDIC family for applications where information has to be transmitted contactless. The IDIC® is connected to a

MV02

Abstract: SMMD835-SOD323 smmd840 SMMD805-SOD323 SMPN7316 SMMD-840
Contextual Info: Wireless Communication Surface Mount M icrowave Semiconductors SURFACE M O U N T SOT23 SMPN SERIES PIN DIODES FOR RF SW ITC H IN G A N D ATTENUATING ï l i l C - m e te Ü C S CORPORATION FEATURES DESCRIPTION/APPLICATIONS Surface Mount Package • Tape and Reel Available

LM318

Abstract: LMII8-LM218 LM318D lm3180 fast op LM318 LM218 LM218H DIP8 3515 LM318 APPLICATION LM318 application note
Contextual Info: rz lm ii8 - lm 2 1 8 LM 318 r j S G S -T H O M S O N KÆÔ g^(ô E^ ïï^(Q)10(gi SINGLE OPERATIONAL AMPLIFIERS . INPUT OFFSET VOLTAGE : 4 mV max. L M 1 1 8 - LM218 10 mV max. LM318 • INPUT BIAS CURRENT : 250nA max. ■ INPUT OFFSET CURRENT : 50nA max.

SI4010

Abstract: AN369 antenna 868MHZ planar 868 printed antenna design printed antenna 868 transistor smd zy antenna balun RF pcb antenna 434 4010-DAPB four arm spiral antenna
Contextual Info: AN369 Si4 01 0 A N T E N N A I N T E R F A C E GUIDE AND MATCHING NETWORK 1. Introduction This document provides guidelines and design examples for the high impedance matching networks and loop antennas necessary for the proper usage of the Si4010 transmitter.

stepping motor EM 323

Abstract: stepping motor EM - 323 LM 7474 7474 pin configuration 1046v
Contextual Info: y U N IT R O D E UC3717A Stepper Motor Drive Circuit FEATURES DESCRIPTION Full-Step, Half-Step and Micro-Step Capability Bipolar Output Current up to 1A Wide Range of Motor Supply Voltage 10-46V Low Saturation Voltage with Integrated Bootstrap Built-In Fast Recovery Commutating

Contextual Info: CMOS DRAM KM41C4000AL 4 M X 1 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Perform ance range: The Samsung K M 4 1 C 4 0 0 0 A L is a high speed CMOS 4 ,1 9 4 ,3 0 4 bit X 1 Dynamic Random A ccess M em ory Its design is optimized for high perform ance applications

Contextual Info: an A M P com pany GaAs Beam-Lead PIN Diodes MA4GP900 Series V 2.00 Case Style Features • Superior High Spued M icrow ave Switching Diode • 2-3 Nanosecond Sw itching W h e n D riven From T i l Logic • Capacitance as Low as 0.025 pF Specified at 10 G H z

Contextual Info: ANALOG DEVICES Programmable Gain & T/H DAS Amplifier AD365 FEATURES Software Programmable Gain 1, 10, 100, 500 Low Input Noise (0.2|iV p-p) Low Gain Error (0.05% max) Low Nonlinearity (0.005% max) Low Gain Drift (10ppm/°C max) Low Offset Drift (2|iV/°C RTI max)

Contextual Info: microsystems M ay 1999 UltraSPARC“-II CPU Module DATASHEET 400 MHz CPU, 4.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC -II, 400 M H z CPU, 4.0 M byte module, SM E5224UPA-400 delivers high perform ance com puting in a com pact design. Based on the UltraSPARC™ II CPU, this m odule is designed using a small

Contextual Info: DBS SDC-14550 SERIES l i e DATA DEVICE _ _ CORPORATION_ PROGRAMMABLE SYNCHRO/RESOLVER-TO-DIGITAL CONVERTERS PRELIMINARY DESCRIPTION The SDC-14550 Series are small, lowcost hybrid Synchro- or Resolver-toD ig ita l c o n v e r te r s b a se d on a single-chip monolithic. The completely

Contextual Info: SME5222AUPA-400 microsystems Ju ly 1999 _ UltraSPARC -!! CPU Module DATASHEET 400 MHz CPU, 2.0 MB E-Cache M o d u l e D e s c r ip t io n The U ltraSPARC™ -II, 400 M H z CPU, 2.0 M byte E-cache module, SM E5222AUPA-400 , delivers high perfor­

Contextual Info: microsystems J u ly 1999 UltraSPARC -!! CPU Module 360 MHz CPU, 4.0 MB E-Cache DATASHEET M o d u l e D e s c r ip t io n The U ltraSPARC™ -II, 360 M H z CPU, 4.0 M byte E-cache module, SM E5224AUPA-360 delivers high perfor­ m ance com puting in a com pact design. Based on the UltraSPARC™ -II CPU, this m odule is designed using a

AD5901

Abstract: electrical schematic diagram WELDER schematic WELDER thermocouple schematic diagram resistance welder schematic WELDER capacitor schematic WELDER schematic diagram WELDER capacitor welder schematic ad590s AD590
Contextual Info: ANALOG DEVICES Two-Terminal 1C Temperature Transducer FEATURES Linear Current Output: 1/nA/°K Wide Range: -5 5 °C to +150°C Probe Compatible Ceramic Sensor Package Two-Terminal Device: Voltage In/Current Out Laser Trimmed to ±0.5°C Calibration Accuracy A D 590M

full subtractor using NOR gate for circuit diagram

Abstract: full subtractor circuit using nor gates AX277 2 bit full adder SIGNAL PATH DESIGNER full subtractor circuit using nand gate
Contextual Info: VITESSE SEMICONDUCT OR 30E D H '1502331 GODDeTb 5 * V T S T -M -H ! Features • VLSI Complexity: > 35,000 Gates •Very Low Power Disspation • Superior Performance: 300M Hz to 3 GHz ■High Yielding, 4 Layer Metal, VLSI Process • Choice of Operating Temperature Ranges:

IDT72245LB

Contextual Info: CMOS SyncFIFO 256 X 18, 512 X 18,1024 x 18, 2048 x 18 and 4096 x 18 ID T72205LB IDT72215LB ID T72225LB ID T72235LB ID T72245LB Integrated Device Technology, Inc. FEATURES: • • • • • • • • • • • • • 256 x 18-bit organization array 72205LB

Contextual Info: SAMSUNG ELECTRONICS INC L7E D • 7 ^ 4 1 4 2 DDlSb30 77D ■ SM6K KM41C4002B CMOS DRAM 4M x 1Bit CMOS Dynamic RAM with Static Column Mode FEATURES GENERAL DESCRIPTION • Performance range: The Sam sung KM 41C4002B is a C M O S high speed 4,194,304 x 1 Dynamic Random A cce ss Memory. Its de­

Contextual Info: User’s Guide Shop online at www.omega.com e-mail: info@omega.com OS550/OS550-BB Series Industrial Infrared Thermometer/Transmitter OMEGAnet Online Service www.omega.com Internet e-mail info@omega.com Servicing North America: USA: ISO 9001 Certified Canada:

Contextual Info: / T 7 S C S -T H O M S O N *7 M , « IM ilL Ë O T IM O S T V 0 1 1 6 PAL/NTSC DIGITAL ENCODER • BOTH 625 & 525 LINES MULTIPLEXED 8 BIT DIGITAL INPUT ACCORDING TO CCIR 601 -2 AND REC 656 ■ NTSC M, PALB, D, G, H, I, PAL N ARGEN­ TINA PROGRAMMABLE OUTPUT

RC5201G

Abstract: WSL2512R018
Contextual Info: F A IR C H IL D w w w .fa irc h ild s e m i.c o m s e m i c o n d u c t o r tm RC5201 Chemistry Independent Intelligent Battery C harger Features Applications • Notebooks’fast chargers • PDAs • Hand-held portable instruments Description An innovative power control loop allows operation from line

FRAC16

Abstract: 726 MOTOROLA TRANSISTORS 56800E DSP56800 DSP56824 MOTOROLA 726 M
Contextual Info: Freescale Semiconductor, Inc. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 Freescale Semiconductor, Inc. ARCHIVED BY FREESCALE SEMICONDUCTOR, INC. 2005 Embedded SDK Software Development Kit G.726 Speech Codec Library SDK118/D Rev. 2, 07/19/2002 Motorola, Inc., 2002. All rights reserved.

D2S46

Abstract: D2S4
Contextual Info: Low Cost 16-Bit Synchro/ Resolver-to- Digital Converter ANALOG DEVICES FEATURES T he device incorporates a high accuracy differential conditioning circuit for signal inputs providing m ore than 74 dB of commonm ode rejection. O ptions are available for both synchro and re­

6012dm

Abstract: HTL LOGIC
Contextual Info: A m 6012/ 6012A • A m 6022/ 6022A 12-Bit High and Ultra-High Speed Multiplying D/A Converters DISTINCTIVE CHARACTERISTICS • • • • • • • All grades 12-bit monotonie over tem perature • Differential nonlinearity to ±0.012% 13 bits m ax over

Contextual Info: MOTOROLA Order this document by MTB50N06VL/D SEMICONDUCTOR TECHNICAL DATA D esigner’s Data Sheet MTB50N06VL TMOS V™ Power Field Effect Transistor D2PAK for S urface Mount Motorola Preferred Device N-Channel Enhancement-Mode Silicon Gate TMOS V is a new technology designed to achieve an on-resistance