DS78 Search Results

ds7830j

Abstract: DS7830 J14A DUAL Differential Line DRIVER
Contextual Info: DS7830 Dual Differential Line Driver General Description Features The DS7830 is a dual differential line driver that also performs the dual four-input NAND or dual four-input AND function. TTL Transistor-Transistor-Logic multiple emitter inputs allow this line driver to interface with standard TTL systems.

DS7802J

Abstract: 0588 8T25 DS8802J DS7806J DS7802 OS88
Contextual Info: DS3625, DS7802/DS8802, DS7806/DS8806 Am National Sem iconductor MOS Memory Interface Circuits DS3625, DS7802/DS8802, DS7806/DS8806 Dual High Speed TRI-STATE MOS to TTL Level Converters General Description Features T h e D S 3 6 2 5 , D S 7 8 0 2 /D S 8 8 0 2 , D S 7 8 0 6 /D S 8 8 0 6

RS423

Abstract: DS7820 DS78C120 J16A
Contextual Info: DS78C120 Dual CMOS Compatible Differential Line Receiver General Description Features The DS78C120 is a high performance, dual differential, CMOS compatible line receiver for both balanced and unbalanced digital data transmission. The inputs are compatible

ds8830

Abstract: DS78C20 DS88C20 DS88C20N RS-423 DS8820
Contextual Info: DS78C20/DS88C20 Dual CMOS Compatible Differential Line Receiver General Description Features The DS78C20 and DS88C20 are high performance, dual differential, CMOS compatible line receivers for both balanced and unbalanced digital data transmission. The inputs are

DS8820

Abstract: C1996 DS7820 DS7820J DS7820W DS8820N J14A N14A W14B
Contextual Info: DS7820 DS8820 Dual Line Receiver General Description Features The DS7820 specified from b55 C to a 125 C and the DS8820 specified from 0 C to a 70 C are digital line receivers with two completely independent units fabricated on a single silicon chip Intended for use with digital systems

DS8837M

Abstract: DS8837N ds8837 DS7837 DS7837J J16A M16A
Contextual Info: DS7837 DS8837 Hex Unified Bus Receiver General Description Features The DS7837 DS8837 are high speed receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus to

AN214 amplifier circuit diagram

Abstract: 78ls12 78LS120 DS78LS120J/883C AN214 schematic diagram
Contextual Info: DS78LS120 Dual Differential Line Receiver Noise Filtering and Fail-Safe General Description The DS78LS120 is a high performance, dual differential, TTL compatible line receiver for both balanced and unbalanced digital data transmission. The inputs are compatible with

DS8830

Abstract: DS8830N J14A N14A
Contextual Info: DS7830/DS8830 Dual Differential Line Driver General Description Features The DS7830/DS8830 is a dual differential line driver that also performs the dual four-input NAND or dual four-input AND function. n Single 5V power supply n Diode protected outputs for termination of positive and

DS88LS120N

Abstract: DS78LS120 DS88LS120 RS423 max3860 422 ttl
Contextual Info: General Description The DS78LS120 and DS88LS120 are high performance, dual differential, TTL compatible line receivers for both balanced and unbalanced digital data transmission. The inputs are compatible with EIA, Federal and MIL standards. The line receiver will discriminate a ± 200 mV input signal

rs-422 TO TTL CONVERTERS

Contextual Info: DS78LS120 is OBSOLETE DS78LS120QML, DS78LS120 www.ti.com SNLS370B – MAY 2004 – REVISED NOVEMBER 2004 DS78LS120/DS78LS120QML Dual Differential Line Receiver Noise Filtering and Fail-Safe Check for Samples: DS78LS120QML, DS78LS120 FEATURES 1 • 2 •

DS8836N

Abstract: C1996 DS7836 DS7836J DS8836 J14A N14A 15pFTotal
Contextual Info: DS7836 DS8836 Quad NOR Unified Bus Receiver General Description Features The DS7836 DS8836 are quad 2-input receivers designed for use in bus organized data transmission systems interconnected by terminated 120X impedance lines The external termination is intended to be 180X resistor from the bus

DS8820A

Abstract: DS7820A DS7820AF DS7820AN DS8820AF DS8820AN EIA-RS232C S7820A DUAL Differential Line Receiver "Dual Line Receiver"
Contextual Info: ANALOG DIVISION MARCH 1982 DUAL LINE RECEIVER DS7820A/DS8820A DESCRIPTION FEATURES The DS7820A and the DS8820A are im ­ proved perform ance d ig ita l line receivers w ith tw o com pletely independent u nits fa b ­ ricated on a single silico n chip. Intended fo r

DS8820

Abstract: DS7820 DS820 0588 DS7820F DS7820N DS7830 DS8820F
Contextual Info: MARCH 1982 ANALOG DIVISION DUAL LINE RECEIVER DESCRIPTIO N DS7820/DS8820 FEATURES The DS7820, specified fro m -5 5 ° C to 125°C, and the DS8820, specified fro m 0 °C to 70°C, are d ig ita l line receivers w ith tw o co m ple te ly independent units fabricated on

DS8839N

Abstract: DS8834J 0588 ds7839 DS7834 DS7834J DS8834 DS8834N J16A N16A
Contextual Info: DS7834/DS8834/DS7839/DS8839 National éLM Semiconductor DS7834/DS8834/DS7839/DS8839 Quad TRI-STATE^ Bus Transceivers General Description Features This family of TRI-STATE bus transceivers offers extreme versatility in bus organized data transmission systems. The

Contextual Info: DS78LS120 is OBSOLETE DS78LS120QML, DS78LS120 www.ti.com SNLS370C – SEPTEMBER 1999 – REVISED APRIL 2013 DS78LS120/DS78LS120QML Dual Differential Line Receiver Noise Filtering and Fail-Safe Check for Samples: DS78LS120QML, DS78LS120 FEATURES DESCRIPTION

axi ethernet lite software example

Abstract: zynq axi ethernet software example microblaze ethernet V101A microblaze axi ethernet lite microblaze ethernet lite
Contextual Info: LogiCORE IP Ethernet Lite MAC v1.01a DS787 October 19, 2011 Product Specification Introduction LogiCORE IP Facts Table The LogiCORE IP AMBA AXI Ethernet Lite MAC (Media Access Controller) is designed to incorporate the applicable features described in the IEEE Std. 802.3

G0735

Abstract: Digital Line Receivers DS78C120 DS88C120 DS88C120N N16A RS423 DS751
Contextual Info: DS78C120/DS88C120 N a t i o n a l S e m i c o n d u c t o r DS78C120/DS88C120 Dual CMOS Compatible Differential Line Receiver General Description Features The DS78C120 and DS88C120 are high performance, dual differential, CMOS compatible line receivers for both bal­

DS7836

Abstract: DS7836J DS8836 DS8836N J14A N14A
Contextual Info: DS7836/DS8836 Quad NOR Unified Bus Receiver General Description Features The DS7836/DS8836 are quad 2-input receivers designed for use in bus organized data transmission systems inter­ connected by terminated 1 2 0 ii impedance lines. The exter­ nal termination is intended to be 180fl resistor from the bus

D 1207 T 1F

Contextual Info: DS7830/DS8830 National m m Semiconductor DS7830/DS8830 Dual Differential Line Driver General Description Features The DS7830/DS8830 is a dual differential line driver that also performs the dual four-input NAND or dual four-input AND function. • Single 5V power supply

RS232-C

Contextual Info: DS78C120 & National Semi conduct or DS78C120 Dual CMOS Compatible Differential Line Receiver General Description Features The DS78C120 is a high performance, dual differential, CMOS compatible line receiver for both balanced and unbal­ anced digital data transmission. The inputs are compatible

DS7820

Abstract: DS7830 DS78C20 DS8820 DS8830 DS88C20 RS-423 AN-108 NATIONAL SEMICONDUCTOR Applicaton note 32
Contextual Info: DS78C20 DS88C20 Dual CMOS Compatible Differential Line Receiver General Description Features The DS78C20 and DS88C20 are high performance dual differential CMOS compatible line receivers for both balanced and unbalanced digital data transmission The inputs

Contextual Info: National DS7834/DS8834 e* Semiconductor DS7834/DS8834 Quad TRI-STATE« Bus Transceivers General Description Features This family of TRI-STATE bus transceivers offers extreme versatility in bus organized data transmission systems. The data bus may be unterminated, or terminated DC or AC, at

DS7838

Contextual Info: DS7838/DS8838 Semiconductor National DS7838/DS8838 Quad Unified Bus Transceiver General Description Features The DS7838/DS8838 are quad high speed drivers/receiv­ ers designed for use in bus organized data transmission systems interconnected by terminated 12 0 fl impedance

DS8820N

Contextual Info: NATL S E M I C O N D M E M O R Y bSDHSb bflE D G ü b T H Ü ß 7MO « N S C 3 DS7820/DS8820 50 National mm Semiconductor DS7820/DS8820 Dual Line Receiver General Description Features The DS7820, specified from -55°C to + 1 25“C, and the DS8820, specified from 0°C to + 70°C, are digital line re­