DRIVING POINT AND TRANSFER Search Results
DRIVING POINT AND TRANSFER Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| DS1631J-8/883 |
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DS1631 - Buffer/Inverter Based Peripheral Drive, CDIP8 - Dual marked (5962-8863101PA) |
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| MG80960MC-25/B |
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32-Bit Microprocessor With Floating Point Unit and MMU |
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| MG80960MC-25 |
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32-Bit Microprocessor With Floating Point Unit and MMU | |||
| UA78M05MJG/B |
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UA78M05 - Fixed Volt Regulator |
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| ADSP-2105BPZ-80 |
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ADSP-2105 - 16-Bit Fixed-Point DSP Microprocessor (-40C to + 85C) |
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DRIVING POINT AND TRANSFER Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
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Contextual Info: User's Guide SNVA497B – July 2011 – Revised May 2013 AN-2175 LM21305 POL Demonstration Module and Reference Design 1 Introduction This LM21305 synchronous buck switching regulator board-mounted module is a complete, easy-to-use DC-DC point-of-load POL solution capable of driving up to 5A of load current with excellent conversion |
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SNVA497B AN-2175 LM21305 | |
cdv304
Abstract: capacitive coupling ethernet CDC111 CDCV304 CDCVF111 HPA8133A TLK3104SA
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SCAA049 CDC111/CDCVF111 TLK3104SA TLK3104 TLK3104SA. cdv304 capacitive coupling ethernet CDC111 CDCV304 CDCVF111 HPA8133A | |
QS34X245Q3
Abstract: QS74FCT534 driving point and transfer AN-41
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AN-41 MAPN-00041-00 QS34X245Q3 QS74FCT534 driving point and transfer AN-41 | |
selic
Abstract: M52767FP SG10 V17L MITSUBISHI NFB
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Contextual Info: Digital Temperature Controllers E5@Z 1/16, 1/8, and 1/4 DIN Temperature Controllers Join the Best-selling E5@Z Series • Models available with either temperature inputs or analog inputs. • A wide range of functions, such as a loop break alarm LBA , manual output, and transfer output. |
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11-segment NL-2132 H209-E1-03 | |
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Contextual Info: M65KG256AF 256Mbit 4 Banks x 4M x 16 1.8 V Supply, 133MHz, DDR Low Power SDRAM Preliminary Data Feature summary • 256Mbit Synchronous Dynamic RAM – Organized as 4 Banks of 4MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/clock cycle |
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M65KG256AF 256Mbit 133MHz, 256Mbit 266Mbit/s 133MHz M65KG256AF8W6T M65KG256AF | |
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Contextual Info: M65KG512AA 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR low power SDRAM Features • 512Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 8 Mwords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 266 Mbit/s (max) |
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M65KG512AA 512Mbit 512Mbit M65KG512AA8W9 M65KG512AA | |
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Contextual Info: M65KG512AA 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR low power SDRAM Features • 512Mbit Synchronous Dynamic Ram – Organized as 4 Banks of 8 Mwords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 266 Mbit/s (max) |
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M65KG512AA 512Mbit 512Mbit | |
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Contextual Info: M65KG512AB 512Mbit 4 Banks x 8M x 16 1.8V supply, DDR Low Power SDRAM Features • 512Mbit Synchronous Dynamic RAM – Organized as 4 Banks of 8MWords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 332Mbit/s max. for 6ns speed |
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M65KG512AB 512Mbit 512Mbit 332Mbit/s 133MHz 166MHz | |
manual omron E5CN-Q2MT-500
Abstract: E5CN-R2T manual omron E5C 96X96 E5CN-R2T UV101 OMRON E5CN-Q2MT-500 E5CN-Q2MT-500 Omron OMRON E5CN-Q1TU E5EN
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11-segment omron247 H136-E1-01B. manual omron E5CN-Q2MT-500 E5CN-R2T manual omron E5C 96X96 E5CN-R2T UV101 OMRON E5CN-Q2MT-500 E5CN-Q2MT-500 Omron OMRON E5CN-Q1TU E5EN | |
temperature controller circuit diagram with relay
Abstract: manual omron E5CN-Q2MT-500 E5CN-Q2MT-500 E5CN-R2MT-500 omron ct E54-CT1 diagram 3 phase heater E5CN-R2T 4 to 20ma current source circuit diagram E5CN-R2T manual omron e5cn
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11-segment AWG14 H136-E2-01-X NL-2132 temperature controller circuit diagram with relay manual omron E5CN-Q2MT-500 E5CN-Q2MT-500 E5CN-R2MT-500 omron ct E54-CT1 diagram 3 phase heater E5CN-R2T 4 to 20ma current source circuit diagram E5CN-R2T manual omron e5cn | |
M65KG512ABContextual Info: M65KG512AB 512Mbit 4 banks x 8 Mb x 16 1.8 V supply, DDR low power SDRAM Features • 512Mbit Synchronous Dynamic RAM – Organized as 4 banks of 8 Mwords, each 16 bits wide ■ Double Data Rate (DDR) – 2 Data Transfers/Clock cycle – Data Rate: 332 Mbit/s max. for 6ns speed |
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M65KG512AB 512Mbit 512Mbit M65KG512AB | |
manual omron E5CN-Q2MT-500
Abstract: E5CN-R2T manual E5EN-Q3HMT-500 E5CN-R2T E5AN-R3HMT-500 E5EN-R3HMT-500 E5EN-R3MT-500 PT100 IEC 751 E5AN-R3MT-500 E5EN-C3MT-500
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11-segment H136-E1-01 75-344-7080/Fax: 0205-2M manual omron E5CN-Q2MT-500 E5CN-R2T manual E5EN-Q3HMT-500 E5CN-R2T E5AN-R3HMT-500 E5EN-R3HMT-500 E5EN-R3MT-500 PT100 IEC 751 E5AN-R3MT-500 E5EN-C3MT-500 | |
DM 024
Abstract: DDR400 PC3200 DDR266 DDR333 512mb sodimm pc2700 200 pin samsung
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W3EG264M72EFSUxxxD4 2x64Mx72 PC-2100, PC-2700 PC3200 W3EG264M72EFSU 512Mb 64Mx8 200MHz DM 024 DDR400 PC3200 DDR266 DDR333 512mb sodimm pc2700 200 pin samsung | |
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HD61102
Abstract: vqc 10 display HD61103A
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HD61102------------------- HD61102 HD61102, HD6800 HD6801, HD61102 HD61103As COM65 COM66 COM64 vqc 10 display HD61103A | |
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Contextual Info: H D 6 1 1 0 2 - D o t M atrix Liquid Crystal Graphic Display Colum n D river Description Features HD61102 is a column (segment) driver for dot matrix liquid crystal graphic display systems. It stores the display data transferred from a 8-bit |
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HD61102 HD61102, HD6800 HD6801, HD61102 HD61103As COM65 COM66 COM64 COM128 | |
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Contextual Info: 19-6276; Rev 0; 4/12 EVALUATION KIT AVAILABLE MAX14611 Quad Bidirectional Low-Voltage Logic-Level Translator General Description The MAX14611 is a quad bidirectional logic-level translator that provides the level shifting necessary to allow data transfer in a multivoltage system. Externally applied voltages, VCC and VL, set the logic levels on either side of |
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MAX14611 MAX14611 | |
max1461
Abstract: max14611 MAX14611ETD MAX3378
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MAX14611 max1461 MAX14611ETD MAX3378 | |
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Contextual Info: HD61202- Dot Matrix Liquid Crystal Graphic Display Column Driver Description Features HD61202 is a column (segment) driver for dot matrix liquid crystal graphic display systems. It stores the display data transferred from a 8-bit micro controller in the internal display RAM and |
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HD61202----------------------- HD61202 HD61202, HD6800 HD6801, HD61202 HD61203s COM65 COM66 COM64 | |
HD61203 * HD61202Contextual Info: H D61202- Dot Matrix Liquid Crystal Graphic Display Column Driver Description Features HD61202 is a column (segment) driver for dot matrix liquid crystal graphic display systems. It stores the display data transferred from a 8-bit |
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D61202-----------------------Description HD61202 HD61202, HD6800 HD6801, HD61202 HD61203s COM65 COM66 COM64 HD61203 * HD61202 | |
hitachi hd61202
Abstract: RM4J
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D61202------------------ HD61202 HD61202 HD61203 COM65 COM66 C0M64 COM128 hitachi hd61202 RM4J | |
hd61103aContextual Info: HD61102- Dot M atrix Liquid C rystal G raphic D isplay C olum n Driver SECTION DESCRIPTION HD61102 is a column (segment) driver for 1 dot matrix liquid crystal graphic display systems. It stores the display data transferred from a 8-bit micro-computer |
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HD61102 HD61102 HD61102, C0M64. HD61103A COM65 | |
Hitachi LCD 20 piNContextual Info: HD66310T- TFT-Type LCD Driver for VDT Description The HD66310T is a drain bus driver for TFT-type (thin film transistor) LCDs. It receives 3-bit digital data for one dot, selects a level from eight voltage levels, and outputs the level to an LCD. |
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HD66310T----------------- HD66310T HD66310T* HD66310T Hitachi LCD 20 piN | |
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Contextual Info: H D6631OT- TFT-Type LCD Driver for VDT Description The HD66310T is a drain bus driver for TFT-type (thin film transistor) LCDs. It receives 3-bit digital data for one dot, selects a level from eight voltage levels, and outputs the level to an LCD. |
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D6631OT---------------------Description HD66310T HD66310T* 203-pin HD66310T | |