DPS32 Search Results
DPS32 Datasheets (7)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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DPS32KX32Y5 | DPAC Technologies | M-densus High Density Memory | Scan | 762.69KB | 7 | ||
DPS32KX32Y5-12C | DPAC Technologies | 1 Megabit High Speed SRAM | Scan | 762.69KB | 7 | ||
DPS32KX32Y5-12CI | DPAC Technologies | 1 Megabit High Speed SRAM | Scan | 762.69KB | 7 | ||
DPS32KX32Y5-15C | DPAC Technologies | 1 Megabit High Speed SRAM | Scan | 762.69KB | 7 | ||
DPS32KX32Y5-15CI | DPAC Technologies | 1 Megabit High Speed SRAM | Scan | 762.69KB | 7 | ||
DPS32KX32Y5-20C | DPAC Technologies | 1 Megabit High Speed SRAM | Scan | 762.69KB | 7 | ||
DPS32KX32Y5-20CI | DPAC Technologies | 1 Megabit High Speed SRAM | Scan | 762.69KB | 7 |
DPS32 Price and Stock
Omega Engineering DPS3207-RDPS3207-R |
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Omega Engineering DPS3207-S-1DPS3207-S-1 |
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Omega Engineering DPS3207-S-4DPS3207-S-4 |
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Omega Engineering DPS3207-S-2DPS3207-S-2 |
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Omega Engineering DPS3204-TC-6DPS3204-TC-6 |
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DPS32 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: □PM . Dense-Pac Microsystems Inc. DPS32M8A ^ HICH SPEED 32K X 8 CMOS SRAM MONOLITHIC ADVANCED INFORMATION DESCRIPTION: The DPS32M8A is a 32K X 8 CMOS Static Random Access Memory SRAM . The memory utilizes asynchronous circuitry and may be maintained in any |
OCR Scan |
DPS32M8A DPS32M8A DPS32M 30A001-10 | |
Contextual Info: 1 Megabit CMOS SRAM D EN SE-PA C DPS3232V M I C R O S Y S Ï li M S DESCRIPTION: The DPS3232V is a 66-pin Pin Grid Array PGA consisting of four 32K x 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matching thermal coefficients. The LCCs are |
OCR Scan |
DPS3232V 66-pin 128Kx32 256Kx32, DPS3232V 12SKX8, 64KX16 | |
Contextual Info: □PM DPS32M8A Dense-Pac Microsystems, Inc. O H IG H SPEED 32K X 8 C M O S S R A M M O N O L IT H IC ADVANCED INFORMATION D ESCRIPTIO N: The D P S 3 2 M 8 A is a 32K X 8 C M O S Static Random A c ce ss M e m o ry SR A M . The m em ory utilizes asynchronous circuitry and may be maintained in any |
OCR Scan |
DPS32M8A 28-Pin 32-Pad 30AOOM | |
DPD72PG1
Abstract: 23L206 AA2876A 34n20 DPD72 AA2876 DPS32PG1 270AN Anaheim Automation
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DPD72PG1 DPS32PG1 AA2876 DPS32PG1 DPD72PG1 DPD72PG1, 23L206 23L306 AA2876A 34n20 DPD72 270AN Anaheim Automation | |
Contextual Info: T Dense-Pac Microsystems, Inc. DPS32M8A H IG H SP E E D 3 2 K X 8 C M O S S R A M M O N O L IT H IC O ADVANCED INFORMATION DESCRIPTION: The D P S 3 2 M 8 A is a 3 2 K X 8 C M O S Static Random A c c e s s M e m o r y S R A M . T h e m e m o ry utilizes |
OCR Scan |
DPS32M8A PS32M 28-Pin 32-Pad 30A001-10 | |
Contextual Info: / □PM Dense-Pac Microsystems, Inc. DPS32X16A r o H I G H S P E E D 3 2 K X 16 C M O S S R A M P G A M O D U L E PRELIMINARY D E S C R IP T IO N : The D P S 3 2 X 1 6 A is a 40-pin Pin Grid Array P G A consisting of two 3 2 K X 8 S R A M devices in ceramic |
OCR Scan |
PS32X 40-pin 150ns 30A05001 | |
twilightContextual Info: □PM Dense-Pac Microsystems, Inc. DPS3232V 32K X 32 CMOS SRAM VERSAPAC MODULE O DESCRIPTION: The DPS3232V is a 66-pin Pin Grid Array PGA consisting of four 3 2 K X8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceram ic substrate w ith m atching thermal |
OCR Scan |
DPS3232V DPS3232V 66-pin 128KX32 256KX32 S3232 100ns 120ns 150ns twilight | |
Contextual Info: DPS32X16A □PM Dense-Pac Microsystems, Inc. O H IG H SPEED 3 2 K X 16 C M O S S R A M P G A M O D U L E PRELIM INARY DESCRIPTIO N: The DPS32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 S R A M devices in ceramic LCC packages surface mounted on a co-fired ceramic |
OCR Scan |
DPS32X16A DPS32X16A 40-pin 150ns Ope55 100ns 120ns 32KX16 30A050-01 | |
Contextual Info: □PM DPS32M8A Dense-Pac Microsystems. Inc. HIGH SPEED 32K X 8 CM OS SRAM MONOLITHIC ADVANCED INFORMATION DESCRIPTION: The DPS32M8A is a 32K X 8 CM OS Static Random Access Memory SRAM . The memory utilizes asynchronous circuitry and may be maintained in any |
OCR Scan |
DPS32M8A DPS32M8A PS32M | |
Contextual Info: D FN SF-P A C m,rc li o s y s r Jr: .vi 3 /k -D & u u s High Density Memory Device 1 Megabit High Speed SRAM DPS32KX32Y5 PRELIMINARY D ESCR IPTIO N : The DPS32KX32Y5 a 32K x 32 SRAM module the utilize the new and innovative space saving TSOP stacking technology. The module is constructed of |
OCR Scan |
DPS32KX32Y5 DPS32KX32Y5 128Kx& 30A192 | |
"32K x 32" SRAM
Abstract: DPS32KX32Y5
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OCR Scan |
DPS32KX32Y5 DPS32KX32Y5 128Kx8 30A192-06 "32K x 32" SRAM | |
Contextual Info: D E N S E -P A C M 1 C R O S Y S T e Ms /H - T c n S k S ¡-j¡gh Density Memory Device 1 Megabit High Speed SRAM dps32KX32Y5 PRELIMINARY DESCRIPTION: The DPS32KX32Y5 a 32K x 32 SRAM module the utilize the new and innovative space saving TSOP stacking technology. The module is constructed of |
OCR Scan |
dps32KX32Y5 DPS32KX32Y5 30A192-06 | |
Contextual Info: DENSE-PAC 1 Megabit CMOS SRAM MICROSYSTEMS DPS3232V DESCRIPTION: The DPS3232V is a 66-pin Pin Grid Array PGA consisting of four 32K x 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matchi ng thermal coeffi cients. The LCCs |
OCR Scan |
DPS3232V DPS3232V 66-pin 128Kx32 256Kx32, 128KX8, 64KX16 32KX32 30A014-10 275T415 | |
32Kx4Contextual Info: □P M DPS32X16A Dense-Pac Microsystems, Inc. O H IG H SPEED 32K X 16 C M O S S R A M P G A M O D U L E PRELIMINARY DESCRIPTION: The DPS32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 SR A M devices in ceramic LCC packages surface mounted on a co-fired ceramic |
OCR Scan |
DPS32X16A DPS32X16A 40-pin 150ns A0-A14 30A05001 32Kx4 | |
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Contextual Info: 1 Megabit CMOS SRAM D EN SEFAC M I C R O S Y S ï If MS DPS3232V-35I-TI DESCRIPTION: The DPS3232V-35I-TI is a 66-pin Pin Grid Array PGA consisting of four 32K x 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matching thermal coefficients. The LCCs |
OCR Scan |
DPS3232V-35I-TI DPS3232V-35I-TI 66-pin 64KX32 | |
Contextual Info: DPS3232V Dense-Pac Microsystems, Inc. ^ 32K X 32 CMOS SRAM VERSAPAC MODULE DESCRIPTION: The DPS3232V is a 66-pin Pin G rid Array PGA consisting o f fo u r 32K X 8 SRAM devices in ceramic LCC packages surface m o u n te d on a co-fired c e ra m ic s u b s tra te w ith m a tc h in g th e rm a l |
OCR Scan |
DPS3232V DPS3232V 66-pin 128KX32 256KX32 30A014-10 | |
Contextual Info: DENSE-PAC 1 Megabit CMOS SRAM MICROSYSTEMS DPS3232V D E SC R IP T IO N : The DPS3232V is a 66-pin Pin Grid Array PGA consisting of four 32K x 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matching thermal coefficients. The LCCs |
OCR Scan |
DPS3232V 66-pin 128Kx32 256Kx32, DPS3232V 12SKX8. 64KX16 30A014-10 | |
DP645
Abstract: vlt 2800 AJJ 610 Dense-Pac Microsystems DPS41288-120M DPS41288-70I vlt 2800 application dps41288-150m C18045 E148
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OCR Scan |
DPS32KX DPS32K DPS45128 DPS45129 DPS4648 DPS4968 DPS41288 DPS96122 DP645 vlt 2800 AJJ 610 Dense-Pac Microsystems DPS41288-120M DPS41288-70I vlt 2800 application dps41288-150m C18045 E148 | |
DPS3232VContextual Info: 1 Megabit CM O S SRAM D EN SE-PA C M ÍC R O S Y SÏ \r, MS DPS3232V-35I-TI DESCRIPTION: The DPS3232V-35I-TI is a 66-pin Pin Grid Array PGA consisting of four 32K x 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matchingthermal coefficients. The LCCs |
OCR Scan |
DPS3232V-35I-TI DPS3232V-35I-TI 66-pin 128KX8, 64KX32 32KX32 A014-1 DPS3232V | |
Contextual Info: □PM D P S 3 2 X 16A Dense-Pac Microsystems, Inc. ^ H IG H S PEED 32K X 16 C M O S S R A M P G A M O D U L E PRELIMINARY D ESC R IPT IO N : The DPS32X16A is a 40-pin Pin Grid Array PGA consisting of two 32K X 8 SR A M devices in ceramic LCC packages surface mounted on a co-fired ceramic |
OCR Scan |
DPS32X16A 40-pin 150ns 100ns 120ns 32KX16 | |
S32M8Contextual Info: T Dense-Pac Microsystems, Inc. ^ DPS32M8A H IG H SPEED 32K X 8 C M O S SRAM M O N O LIT H IC ADVANCED INFORMATION D ES C R IP T IO N : The D PS32M 8A is a 32K X 8 C M O S Static Random A c c e ss M em ory SRA M . The m em ory utilizes asynchronous circuitry and may be maintained in any |
OCR Scan |
DPS32M8A PS32M 30A00M0 S32M8 | |
Contextual Info: □PM DPS3232V 32K X 32 CMOS SRAM VERSAPAC MODULE Dense-Pac Microsystems, Inc. ^ DESCRIPTION: The DPS3232V is a 66-pin Pin G rid Array PGA consisting o f fo u r 32K X 8 SRAM devices in ceram ic LCC packages surface m o u n te d on a co-fired c e r a m ic s u b s tra te w ith m a tc h in g th e rm a l |
OCR Scan |
DPS3232V DPS3232V 66-pin 128KX32 256KX32 | |
Contextual Info: 1 Megabit CMOS SRAM DENSE-PAC DPS3232V-35I-TI MÍCRü S Y ST hMS DESCRIPTION: The DPS3232V-35I-TI is a 66-pin Pin Grid Array PGA consisting of four 32K x 8 SRAM devices in ceramic LCC packages surface mounted on a co-fired ceramic substrate with matchingthermal coefficients. The LCCs |
OCR Scan |
DPS3232V-35I-TI DPS3232V-35I-TI 66-pin 128KX8, 30A014-15 | |
Contextual Info: 1 Megabit CMOS SRAM PENSE-PAC MICROSYSTEMS DPS3232V D E SC R IP TIO N : The D PS3232V is a 66-pin Pin Grid Array PGA consisting of four 32K x 8 SRAM devices in ceramic L C C packages surface mounted on a co-fired ceramic substratewith matching thermal coefficients. The LCCs |
OCR Scan |
DPS3232V 66-pin 128Kx32 256Kx32, 30A014-10 DD0121fl |