DM54166J Search Results

DM54

Abstract: DM54166 DM54166J J16A
Contextual Info: DM54166 8-Bit Parallel In/Serial Out Shift Registers General Description These parallel-in or serial-in, serial-out shift registers feature gated clock inputs and an overriding clear input. All inputs are buffered to lower the drive requirements to one normalized load, and input clamping diodes minimize switching

400X

Abstract: C1995 DM54 DM54166 DM54166J J16A
Contextual Info: DM54166 8-Bit Parallel In Serial Out Shift Registers General Description the low-to-high-level edge of the clock pulse through a twoinput NOR gate permitting one input to be used as a clockenable or clock-inhibit function Holding either of the clock inputs high inhibits clocking holding either low enables the

Contextual Info: 531 National Æ jâ Semiconductor DM54166 8-Bit Parallel In/Serial Out Shift Registers General Description the low-to-high-level edge of the clock pulse through a twoinput NOR gate, permitting one input to be used as a clockenable or clock-inhibit function. Holding either of the clock