DM5403J Search Results

Contextual Info: S E M IC O N D U C T O R tm DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description W h e re : N-, lOH = to ta l m a x im u m o u tp u t h ig h c u rre n t fo r all o u tp u ts tie d to p u ll-u p re s is to r T h is d e v ic e c o n ta in s fo u r in d e p e n d e n t g a te s e a c h o f w h ic h

Contextual Info: DM5403/DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out­ puts require external pull-up resistors for proper logical op­

DM5403

Contextual Info: National Semiconductor DM5403/DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations Vçç Min - Vqh This device contains four independent gates each of which performs the logic NAND function. The open-collector out­

DM54

Abstract: DM5403 DM5403J DM74 DM7403 DM7403N J14A N14A
Contextual Info: June 1989 DM5403/DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs Pull-Up Resistor Equations General Description V çç Min - Vpn This device contains lour independent gates each of which performs the logic NAND function. The open-collector out­

DM7403N

Contextual Info: DM5403,DM7403 DM5403 DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs Literature Number: SNOS223A DM5403 DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations RMAX e VCC Min b VOH N1 (IOH) a N2 (IIH)

DM7403

Abstract: DM54 DM5403 DM5403J DM74 DM7403N J14A N14A
Contextual Info: DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description This device contains four independent gates each of which performs the logic NAND function. The open-collector outputs require external pull-up resistors for proper logical operation.

Contextual Info: DM5403 DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations RMAX e VCC Min b VOH N1 (IOH) a N2 (IIH) VCC (Max) b VOL RMIN e IOL b N3 (IIL) Where N1 (IOH) e total maximum output high current for all outputs tied to pull-up resistor

Contextual Info: National Semiconductor DM5403/DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out­ puts require external pull-up resistors for proper logical op­

Contextual Info: zn National mHSemiconductor DM5403/DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function. The open-collector out­

C1995

Abstract: DM54 DM5403 DM5403J DM74 DM7403 DM7403N J14A N14A 6493
Contextual Info: DM5403 DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description Pull-Up Resistor Equations This device contains four independent gates each of which performs the logic NAND function The open-collector outputs require external pull-up resistors for proper logical operation

Contextual Info: R C H I I - P S E M IC O N D U C T O R tm DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs W here: General Description This device contains fo u r independent gates each of which perform s th e logic N AND function. The o pen-collector out­ puts require external pull-up resistors for proper logical o p ­

t0140

Abstract: DM7403N DM54 DM5403 DM5403J DM74 DM7403 J14A N14A Q-250
Contextual Info: S E M IC O N D U C T O R tm DM7403 Quad 2-Input NAND Gates with Open-Collector Outputs General Description W h e re : T h is d e v ic e c o n ta in s fo u r in d e p e n d e n t g a te s e a c h o f w h ic h p e rfo rm s th e lo g ic N A N D fu n c tio n . T h e o p e n -c o lle c to r o u t­