DIVIDE BY 10 Search Results
DIVIDE BY 10 Result Highlights (5)
| Part | ECAD Model | Manufacturer | Description | Download | Buy |
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| 4213SM | Texas Instruments | Multiplier-Divider 10-TO-100 |
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| CD4521BNSR | Texas Instruments | CMOS 24-Stage Frequency Divider 16-SO -55 to 125 |
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| MPY100BG | Texas Instruments | Multiplier/Divider 14-CDIP SB |
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| MPY100CG | Texas Instruments | Multiplier/Divider 14-CDIP SB |
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| CD4521BEE4 | Texas Instruments | CMOS 24-Stage Frequency Divider 16-PDIP -55 to 125 |
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DIVIDE BY 10 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
HD74HC390
Abstract: Hitachi DSA003776
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Original |
hd74hc390divide-by-100hitachi dsa003776 | |
HD74HC390
Abstract: Hitachi DSA00222
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Original |
hd74hc390ade-205-503divide-by-100hitachi dsa00222 | |
SAB6456
Abstract: prescaler 256 IC02 98 Functional 1 prescaler 64 MS-012AA SAB6456T divide-by-256
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Original |
sab6456sab6456tdivide-by-64/divide-by-256sab6456/sab6456t+6 | |
SAB6456A
Abstract: sab6456 SAB6456AT DIVIDE-BY-256 SO8 DIP8 socket sot97a SAB6456 prescaler
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sab6456sab6456tdivide-by-64/divide-by-256sab6456/sab6456t+8 | |
prescaler 256
Abstract: prescaler 64 SAB6456 MS-012AA SAB6456T sensitive 1 GHz prescaler tuner TELEVISION PINNING
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sab6456sab6456tdivide-by-64/divide-by-256sab6456/sab6456t+7 | |
Hitachi DSA002789Contextual Info: HD74HC390 Dual Decade Counters Description The HD74HC390 incorporate dual decade counters, each composed of a divide-by-two and a divideby-five counter. The divide-by-two and divide-by-five counters can be cascaded to form dual decade, dual bi-quinary, or various combinations up to a single divide-by-100 counter. |
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hd74hc390divide-by-100hitachi dsa002789 | |
HP3200B
Abstract: SI 122 D 3055 5e 3055 smd MC10H181 divide-by-10 msq 216 MPG1678 L 3055 motorola
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OCR Scan |
di-vide-by-10hp3200bsi 122 d3055 5e+6 | |
DIVIDE-BY-100Contextual Info: HD74HC390 # Dual Decaoe Counters The HD74HC390 incorporate dual decade counters, each competed of a divide-by-two and a divide-by-five counter. The divide-by-two and divide-by-five countert can be cas caded to form dual decade, dual bi-quinary, or various corrv |
OCR Scan |
hd74hc390divide-by-100-11ns | |
MAX9316
Abstract: MAX9322 MAX9322ECY MAX9322ETK
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300mv900psmax9322ecymax9322etk+2 | |
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Contextual Info: OBSOLETE PRODUCT HMC791LC4B v03.0412 High Speed Logic - SMT 28 GHz CLOCK DIVIDE-BY-2 / DIVIDE-BY-4 Typical Applications Features The HMC791LC4B is ideal for: Supports Clock Frequencies up to 28 GHz • Frequency Division up to 28 GHz Simultaneous Divide-by-2 and Divide-by-4 Outputs |
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hmc791lc4b660mw600mv16mm2 | |
COUNT15Contextual Info: MOTOROLA MC10178 BINARY COUNTER The M C10178 is a four-bit counter capable of divide-by-two, divide-by-four, divide-by-eight or a divide-by-sixteen function. Clock inputs trigger on the positive going edge of the clock pulse. Set and Reset Inputs override the clock, allowing asyn |
OCR Scan |
mc10178count15 | |
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Contextual Info: HMC791LC4B v02.1209 3 28 GHz CLOCK DIVIDE-BY-2 / DIVIDE-BY-4 Typical Applications Features The HMC791LC4B is ideal for: Supports Clock Frequencies up to 28 GHz • Frequency Division up to 28 GHz Simultaneous Divide-by-2 and Divide-by-4 Outputs • Short, Intermediate, Long Haul Fiber Optic |
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hmc791lc4b660mw600mv | |
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Contextual Info: HMC791LC4B v00.0609 7 DIVIDE-BY-2, DIVIDE-BY-4 0.1 - 28 GHz Typical Applications Features The HMC791LC4B is ideal for: Supports Clock Frequencies up to 28 GHz • Frequency Division up to 28 GHz Simultaneous Divide-by-2 and Divide-by-4 Outputs • Short, Intermediate, Long Haul Fiber Optic |
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hmc791lc4b660mw600mv | |
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Contextual Info: HMC791LC4B v02.1209 7 28 GHz CLOCK DIVIDE-BY-2 / DIVIDE-BY-4 Typical Applications Features The HMC791LC4B is ideal for: Supports Clock Frequencies up to 28 GHz • Frequency Division up to 28 GHz Simultaneous Divide-by-2 and Divide-by-4 Outputs • Short, Intermediate, Long Haul Fiber Optic |
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hmc791lc4b660mw600mv | |
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Contextual Info: MOTOROLA BINARY COUNTER The MC10178 is a four-bit counter capable of divide-by-two, divide-bv-four, divide-by-eight or a divide-by-sixteen function. Clock inputs trigger on the positive going edge of the clock pulse. Set and Reset inputs override the clock, allowing asyn |
OCR Scan |
mc10178 | |
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Contextual Info: # Dual Decade Counters The H D 7 4 H C 3 9 0 incorporate dual decade counters, each | PIN ARRANGEMENT | FUNCTION TABLE Clock Clear A B X X H X L X L composed of a divide-by-two and a divide-by-five counter. The divide-by-two and divide-by-five counters can be cas |
OCR Scan |
divide-by-100 | |
HMC-APH577
Abstract: HMC-XDH151 HMC vco HMC521 HMC516LC5 HMC441LP3E HMC-SDH126 HMC608 HMC-XDH158 HMC506LP4E
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hmc392lc4hmc392lh5hmc564hmc564lc4+13 | |
DIVIDE-BY-60
Abstract: 14566B ETR10
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OCR Scan |
14566bdivide-by-10divide-by-60etr10 | |
02K243-40ME3
Abstract: MO-220-WEED-6 02k24340me3 PCB Rogers RO4003 ro4003 4003C Rogers RO4003* characteristic impedance JEDEC MO 220 WEED-6 adp150 ADF4106
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adf5001-40oc105occp-16-18+14 | |
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Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Binary Counter M C 10154 The MC10154 is a four-bit counter capable of divide-by-tw o, divid e -b yfour, divide-by-eight or a divide-by-sixteen function. Clock inputs trigger on the positive going edge of the clock pulse. Set and |
OCR Scan |
mc1015450-ohmdl122 | |
HD74HC390P
Abstract: HD74HC390 HD74HC390FPEL PRDP0016AE-B PRSP0016DH-B
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Original |
hd74hc390rej03d0624-0200ade-205-503divide-by-100+4 | |
74LS90
Abstract: 74ls90 logic TTL 74LS93 SN54/74LS93 74LS90 application 74LS93 74LS93 pin diagram circuit diagram of 74ls92 74LS90 DATASHEET application of 74LS90
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sn54/74ls90sn54/74ls92sn54/74ls9374ls90+11 | |
74LS90
Abstract: 74LS93 pin diagram 74LS93 P circuit diagram of 74ls92 TTL 74ls90 74LS93 logic symbol TTL 74LS93 74LS90 pin diagram 74LS93 74LS92
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sn54/74ls90sn54/74ls92sn54/74ls9374ls90+11 | |
74LS390
Abstract: 54LS390 54LS393 74HC 74LS393 C1995 MM54HC390 MM54HC393 MM74HC390 MM74HC393
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mm54hc390mm74hc390mm54hc393mm74hc393+8 | |