SMA100A Search Results

Marconi 2030 service manual

Abstract: Marconi 2024 service manual marconi 2030 operating manual
Contextual Info: SMA100A_dat-sw_en_5213-6412-22_cover.indd 1 Data Sheet | 06.01 Test & Measurement R&S SMA100A Signal Generator Specifications 04.06.2013 08:45:04 Version 06.01 June 2013 CONTENTS Key features . 3

DAC1627

Contextual Info: DAC1627D Demo boards – Quick Start v2 1 DAC1627D demoboard+ CGAP2 Board presentation CGAP2 board: Storage and Generation of complex patterns up to 32M I,Q (I Q)- words DAC1627D board 2 DAC1627D demoboard+ CGAP2 Board connections CGAP2 USB Power 5 Vdc SMA100A clock generator : DAC clock

Contextual Info: LMK00725 www.ti.com SNAS625 – SEPTEMBER 2013 Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer Check for Samples: LMK00725 FEATURES APPLICATIONS • • • • • • • 1 • • • • • • Five 3.3V Differential LVPECL Outputs – Additive Jitter: 43 fs RMS typ @ 312.5

Contextual Info: Sample & Buy Product Folder Support & Community Tools & Software Technical Documents LMK00804B SNAS642A – JUNE 2014 – REVISED JULY 2014 LMK00804B Low Skew, 1-to-4 Multiplexed Differential/LVCMOS-to-LVCMOS/TTL Fanout Buffer 1 Features • 1 • • •

853S111BYILF

Abstract: 853S111BKILFT 853S111 853S111BKILF TRANSISTOR MPS 306 ICS853S111BI ICS53S111BIL
Contextual Info: Low Skew, 1-to-10, Differential-to-2.5V, 3.3V ICS853S111BI LVPECL/ECL Fanout Buffer DATA SHEET General Description Features The ICS853S111BI is a low skew, high performance 1-to-10 Differential-to-2.5V/ 3.3V LVPECL/ECL Fanout Buffer. The ICS853S111BI is characterized to operate from either a 2.5V or a

mps 1037

Abstract: 921c ICS854S057I 50-pin lvds
Contextual Info: 4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination ICS854S057I DATA SHEET General Description Features The ICS854S057I is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz. The PCLK, HiPerClockS nPCLK pairs can accept most standard differential

Contextual Info: FemtoClock NG Octal Universal Frequency Translator IDT8T49N283I DATA SHEET General Description Features The IDT8T49N283I has two independent, fractional-feedback PLLs that can be used as jitter attenuators and frequency translators. It is equipped with six integer and two fractional output dividers, allowing

Contextual Info: LMK00725 www.ti.com SNAS625A – SEPTEMBER 2013 – REVISED OCTOBER 2013 Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buffer Check for Samples: LMK00725 FEATURES APPLICATIONS • • • • • • • 1 • • • • • Five 3.3V Differential LVPECL Outputs

R1019

Abstract: R1018 KAD5512P
Contextual Info: Application Note 1725 Authors: Gary Hendrickson and Michael Steffes Ultra Low Power Broadband 8 to 14-Bit Data Acquisition Platform ISLA112P50/55210EV1Z High Speed ADC/AMP Evaluation Board Evaluation Platform Overview • ISLA112P50 High Speed, Low Power ADC [12Bits,500MSPS]

Contextual Info: AN11418 2500 MHz low noise, high linearity amplifier using BGU8053 Rev. 2 — 14 January 2014 Application note Document information Info Content Keywords BGU8053, 2500 MHz, LNA, BTS Abstract This document provides circuit schematic, layout, BOM and typical EVB

r 1206, r0603

Abstract: 0603 10UH BNX016-01 AD9627ABCPZ-105 emerson dcs LED0603 VFAC3 transformer less power supply 6v output TSW-104-08-T-D BNX016-01 murata
Contextual Info: 12-Bit, 80 MSPS/105 MSPS/125 MSPS/150 MSPS, 1.8 V Dual Analog-to-Digital Converter AD9627 FUNCTIONAL BLOCK DIAGRAM AVDD DVDD SDIO/ SCLK/ DCS DFS CSB FD 0:3 A FD BITS/THRESHOLD DETECT DRVDD SPI PROGRAMMING DATA VIN+A SHA ADC VIN–A SIGNAL MONITOR VREF D11A

KAD5512P

Contextual Info: Application Note 1433 Konverter Analyzer User’s Guide High-Speed ADC Evaluation Platform Hardware • Complete High-Speed ADC Measurement Solution • 40MSPS to 500MSPS Operation • Calculation of Critical ADC Parameters SNR, SINAD, SFDR, Harmonics, INL, DNL, Power

Contextual Info: Programmable FemtoClock NG Differential-to-3.3V, 2.5V LVPECL Synthesizer ICS8N3PGDAMBKI-025 DATA SHEET General Description Features The ICS8N3PGDAMBKI-025 is a very versatile programmable LVPECL synthesizer that can be used for OTN/SONET to Ethernet or 10 GB Ethernet to OTN/SONET rate conversions. The conversion

ICS854S057BI

Abstract: 854S057BGILF mps 1037 ICS854057 ICS854S057BGI SMA100A
Contextual Info: 4:1 or 2:1 LVDS Clock Multiplexer with Internal Input Termination ICS854S057BI DATA SHEET General Description Features The ICS854S057BI is a 4:1 or 2:1 LVDS Clock Multiplexer which can operate up to 2GHz. The PCLK, HiPerClockS nPCLK pairs can accept most standard differential

NRPC18

Contextual Info: NRPC_bro_en_5214-6297-12.indd 1 Product Brochure | 02.00 Test & Measurement R&S NRPC Calibration Kits Calibration of power sensors 21.05.2013 10:31:37 R&S®NRPC Calibration Kits At a glance The four modular R&S®NRPC calibration kits are used to calibrate power sensors of the R&S®NRP,

Contextual Info: FSV_FL_dat-sw_en_3606-7982-22_Cover_cc.indd 1 Data Sheet | 10.01 Test & Measurement R&S FSV Signal and Spectrum Analyzer Specifications 27.02.2015 09:52:34 Version 10.01, February 2015 CONTENTS Specifications . 3

BUK 155

Abstract: BYM 268 470 CFK byk 306 SMA33CA BPM T 105 94V-0 MARKING CMK LS BMK SMA12CA bhk 115
Contextual Info: SURF ACE MOUNT UNIDIREC TIONAL AND BIDIRECT IONAL TRANSIE NT V OLTA GE S UPPRESS ORS REVERSE VOLTAGE - 6.8 to 200 VOLTS FORWARD CURRENT - 400 Amperes FEATURES Rating to 200V VBR For surface mou nted applications Reiiable low cost construction utilizing molded plastic te chnique

Contextual Info: FemtoClock NG Octal Universal Frequency Translator IDT8T49N283I DATA SHEET General Description Features The IDT8T49N283I has two independent, fractional-feedback PLLs that can be used as jitter attenuators and frequency translators. It is equipped with six integer and two fractional output dividers, allowing

ICS858S011

Abstract: ICS858S011AKI 858011 ICS858011 ICS858S011I MO-220 SMA100A
Contextual Info: Low Skew, 1-To-2, Differential-To-CML Fanout Buffer ICS858S011I DATA SHEET General Description Features The ICS858S011I is a high speed 1-to-2 Differential-to-CML Fanout Buffer. The ICS858S011I is optimized for high speed and very low output skew, making it suitable for use in demanding applications

853S54AKI-01LFT

Abstract: ICS853S54I loop heat pipes ICS853S54AKI-01 ICS853S54I-01 MO-220 SMA100A
Contextual Info: Dual 2:1, 1:2 Differential-to-LVPECL/ECL Multiplexer ICS853S54I-01 DATA SHEET General Description Features The ICS853S54I-01 is a 2:1/1:2 Multiplexer. The 2:1 Multiplexer allows one of 2 inputs to be selected onto one output pin and the 1:2 MUX switches one input to one of two outputs. This device may be

Contextual Info: FemtoClock NG Octal Universal Frequency Translator IDT8T49N282I DATA SHEET General Description • The IDT8T49N282I has two independent, fractional-feedback PLLs that can be used as jitter attenuators and frequency translators. It is equipped with six integer and two fractional output dividers, allowing

COPPER core type transformer

Abstract: ada4938 41019 429mhz 74264 AD6655 K5823 p4sd LTE halfband filter FIR ic 701 fairchild
Contextual Info: IF Diversity Receiver AD6655 FEATURES APPLICATIONS SNR = 74.5 dBc 75.5 dBFS in a 32.7 MHz BW at 70 MHz @ 150 MSPS SFDR = 80 dBc to 70 MHz @ 150 MSPS 1.8 V analog supply operation 1.8 V to 3.3 V CMOS output supply or 1.8 V LVDS output supply Integer 1-to-8 input clock divider

Contextual Info: Dual, 16-Bit, 2.25 GSPS, TxDAC+ Digital-to-Analog Converter AD9152 Data Sheet FEATURES GENERAL DESCRIPTION Supports input data rates up to 1.125 GSPS Proprietary low spurious and distortion design Single carrier LTE 20 MHz bandwidth BW , ACLR = 77 dBc at 180 MHz IF

Contextual Info: FemtoClock Crystal-to-LVDS 8-Output Clock Synthesizer ICS814S208I DATA SHEET General Description Features The ICS814S208I is an eight LVDS output clock synthesizer designed for wireless infrastructure applications. The device generates eight copies of a selectable 122.88MHz or 153.6MHz