DD 65 N 800 K Search Results
DD 65 N 800 K Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
| thyristor aeg
Abstract: aeg powerblock tt aeg powerblock tt 32 n thyristor AEG t 10 n 600 aeg thyristor aeg powerblock td aeg tt 18 n 1200 aeg tt 46 n 1200 AEG DD 65 N 1200 K AEG DD 31 n 1200 
 | OCR Scan | DT18N 75VDRM 00V/ns thyristor aeg aeg powerblock tt aeg powerblock tt 32 n thyristor AEG t 10 n 600 aeg thyristor aeg powerblock td aeg tt 18 n 1200 aeg tt 46 n 1200 AEG DD 65 N 1200 K AEG DD 31 n 1200 | |
| transistor 936
Abstract: 100 watt hf mosfet 12 volt 150 watt hf transistor 12 volt transistor qz transistor rf m 2528 DU2840V 100 watt hf transistor 12 volt 1000 watt hf transistor 12 volt atc ldo LDS100 
 | OCR Scan | DU2840V 5b422D5 C7C9C12C14 C10C13C15 5b4BE05 transistor 936 100 watt hf mosfet 12 volt 150 watt hf transistor 12 volt transistor qz transistor rf m 2528 DU2840V 100 watt hf transistor 12 volt 1000 watt hf transistor 12 volt atc ldo LDS100 | |
| 44358
Abstract: 4435a serial counter 24129 lek 923 LC587004 LC587006 LC587008 QIP80A 587006 
 | OCR Scan | K4435A LC587008, LC587004, LC587006 LC5B7008 80-pin LC5870 44358 4435a serial counter 24129 lek 923 LC587004 LC587008 QIP80A 587006 | |
| TIC 33 LCDContextual Info: KS0065B 40CH SEGMENT/COMMON DRIVER FOR DOT MATRIX LCD INTRODUCTION 64 QFP The KS0065B is a LCD d rive r LSI w hich is fabricated by low pow er C M O S tech n olo gy. B asically this LSI consists of 2Q¿2bit bidrectional shift register, 2 0 ; ¿2 bit data latch and 2 0 ; ¿2 bit driver, | OCR Scan | KS0065B KS0065B C5037 TIC 33 LCD | |
| se012
Abstract: CF455 ni 6008 rom 512x4 se022 LC587204A kd 503 transistor SE012 diagram SE603 lopg 
 | OCR Scan | LC587208A, 87206A, 87204A, 87202A LC587202A LC587208A 16-bit 512x4 se012 CF455 ni 6008 rom 512x4 se022 LC587204A kd 503 transistor SE012 diagram SE603 lopg | |
| Contextual Info: Fast Asymmetric Thyristors T ype V drm V rrm Itrsm Itsm l i 2dt Itavm^ c V V A kA A2s 10ms 10ms tvj max tvj max *103 A /°C 180° el sin V dsm = V drm V rrm C tq=1 pS A 158 S 600. 1300* 15(50) 400 2,5 30 V(TO) rT (d i/d t)cr V m i2 A / jjs tvj = tvi = DIN I EC | OCR Scan | 0D021A4 | |
| Contextual Info: 4 Megabit CMOS SRAM DPS128X32V3 M ! C K O S ¥ S i li M S DESCRIPTION; The DPS128X32V3 "VERSA-STACK" module is a revolutionary new memory subsystem using Dense-Pac Microsystems7ceramic Stackable Lead less Chip Carriers SLCC mounted on a co-fired ceramic | OCR Scan | DPS128X32V3 DPS128X32V3 30A044-20 | |
| Contextual Info: an A M P com pany RF MOSFET Power Transistor, 2W, 12V 30 - 90 MHz FH2165 Features • • • • • • N -C hannel K nhancem ent M ode Device M eets CRCOM D raw ing A3012716 D esigned for F req u en cy H o p p in g System s 30-90 MHz Lower C ap acitances for B ro a d b an d O p e ra tio n | OCR Scan | A3012716 FH2165 | |
| Contextual Info: S G S - T H O M S O N ¿ 5 S T K 2N 80 ¡m e ra « 7 N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR TYP E V STK2N80 dss 800 V R D S o n Id <7 a 2.1 A • TYPICAL RDS(on) = 5 0 . . AVALANCHE RUGGED TECHNOLOGY ■ . . . . 100% AVALANCHE TESTED REPETITIVE AVALANCHE DATA AT 100°C | OCR Scan | STK2N80 OT-194 P032B | |
| Contextual Info: KS0063B 80CH SEGMENT DRIVER FOR DOT MATRIX LCD INTRODUCTION T h e K S 0 0 6 3 B is a LCD driver LSI w hich is fabricated by low power CM OS technology. B asically this LSI consists of 40x2 bit bidrectional shift register, 40x2 bit data latch and 40x2 bit LCD driver | OCR Scan | KS0063B 40x2channel 1fi87 | |
| 25 ohm semirigidContextual Info: MùkmM m an A M P com pany RF MOSFET Power Transistor, 100W, 28V UF28100M 100-500 MHz V2.00 Features • • • • r»i N -C hannel K nhancem ent M ode Device DMOS S tru ctu re Lower C ap acitances for B ro ad b an d O p e ra tio n High S atu rated O u tp u t Pow er | OCR Scan | UF28100M 303BRANSFORMER. UF201OOM 25 ohm semirigid | |
| Contextual Info: DENSE-PAC 2 Megabit CMOS SRAM MICROSYSTEMS DPS128X16n3 DESCRIPTION: The DPS128X16n3 SRAM "S T A C K " modules are a revolutionarynew memory subsystem using Dense-PacMicrosystems'ceramicStackable LeadlessChip Carriers SLCC . Available in straight leaded, " J " leaded | OCR Scan | DPS128X16n3 DPS128X16n3 50-pin 100ns 120ns -f125â California92841-1428 30A097-02 | |
| KBR1000H
Abstract: 50g k hall LC5872 LC5873 LC5874 LC5876 LC58E76 LC5870 3152A KBR-1000H 
 | OCR Scan | LC58E76 LC58E76 LC587X LC5876 16-kbyte LC5872, LC5873, LC58E74 KBR1000H 50g k hall LC5872 LC5873 LC5874 LC5870 3152A KBR-1000H | |
| Contextual Info: • 7TSTE37 0ü 4b l03 2T3 ■ S G T H _ rZ 7 SGS-THOMSON Ä 7# « fô m io * ! S T K 1 7 N 10 N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR ■ . ■ ■ ■ ■ . TYPE V dss RDS on Id STK17N10 100 V < 0.11 n 17 A TYPICAL RDS(on) = 0.09 Q | OCR Scan | 7TSTE37 STK17N10 | |
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| Contextual Info: m an A M P com pany Low Noise Amplifier 1.575 GHz AM50-0002 V 2.00 Features SO-8 • Low Noise Figure: 1.1S dH fl B H H PIN E i a m 'k ia • High Gain: 27 dH -2284-2440 3 80 4 K » • Low P o w e r Consum ption: 5 to 5 V, 20 mA O rientation m a rk — _ | OCR Scan | AM50-0002 AM50-0002 | |
| tlc27mContextual Info: TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 LinCMOS PRECISION DUAL OPERATIONAL AMPLIFIERS SLOSQ51C - OCTOBER 1987 - REVISED MAY 1999 Low Noise . . . Typically 32 nV/VHz at f = 1 kHz Trimmed Offset Voltage: TLC27M7 . . . 500 nV Max at 25°C, V DD = 5 V Low P o w e r . . . Typically 2.1 mW at 25°C, | OCR Scan | TLC27M2, TLC27M2A, TLC27M2B, TLC27M7 SLOSQ51C TLC27M7 tlc27m | |
| b 595 transistor
Abstract: transistor b 595 
 | OCR Scan | PH1819-10 b 595 transistor transistor b 595 | |
| Contextual Info: M a n A M P <c o m p a n y Power GaAs MMIC Amplifier 2 - 6.5 GHz MAAM26100 V 2.00 Features • • • • • +30 dBm Typical Saturated Power 19 clB Typical Gain 30"'' Typical Pow er Added Kftlciency On-Chip Bias Network DC Decoupled Kl; Input and Output | OCR Scan | MAAM26100 | |
| NT7605
Abstract: y 546 ic ir 2112 pin layout 
 | Original | NT7605 500KHz 540KHz) NT7605 y 546 ic ir 2112 pin layout | |
| MSM64172
Abstract: VQH207 P13CO 
 | OCR Scan | MSM64172 MSM64172 nX-4/20. 2016-byte 128-nibble b724240 b7E454D QE42flb b7E4240 VQH207 P13CO | |
| Contextual Info: □PM Dense-Pac Microsystems, Inc. DPS41288 1 28 K X 8 C M O S S R A M M O D U L E O DESCRIPTION: The DPS41288 is a one m egabit Static Random Access M em o ry SRAM , com p le te w ith m em ory interface logic and on-board capacitor, organized as 128K X 8 | OCR Scan | DPS41288 DPS41288 170ns S41288 128KX8 30A00403 100ns 120ns | |
| Contextual Info: D E N S E -P A C M 1 C R O S Y S T e Ms /H - T c n S k S ¡-j¡gh Density Memory Device 1 Megabit High Speed SRAM dps32KX32Y5 PRELIMINARY DESCRIPTION: The DPS32KX32Y5 a 32K x 32 SRAM module the utilize the new and innovative space saving TSOP stacking technology. The module is constructed of | OCR Scan | dps32KX32Y5 DPS32KX32Y5 30A192-06 | |
| SA978
Abstract: sa979 
 | OCR Scan | PCA167x SCA54 SA978 sa979 | |
| Contextual Info: IN TE G R A TE D C lR C U fT S PCA1 6xx series 32 kHz watch circuits with EEPROM Product specification Supersedes data of September 1993 File under Integrated Circuits, IC16 Philips Semiconductors 1997 Apr 21 PHILIPS P h ilip s S e m i c o n d u c t o r s | OCR Scan | PCA16xx SCA54 | |