DB10A Search Results

AD7265

Abstract: AD7266 AD8022 TMS320C541
Contextual Info: Differential/Single-Ended Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC AD7266 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS;

DB10A

Abstract: AD7356 AD7356BRUZ DB10 DB11B
Contextual Info: Differential Input, Dual, 5 MSPS, 12-Bit, SAR ADC AD7356 Preliminary Technical Data FEATURES Dual 12-bit SAR ADC Simultaneous Sampling Throughput rate: 5 MSPS Per Channel Specified for VDD of 2.5 V No latency to 12 bits Power dissipation: 35 mW at 5 MSPS On-chip reference:

AD7262

Abstract: AD1582 AD780 DB10 lfcsp_VQ package
Contextual Info: 1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators AD7262 FEATURES FUNCTIONAL BLOCK DIAGRAM VREF A AVCC REF VA + VA– AD7262 BUF PGA 12-BIT SUCCESSIVE APPROXIMATION ADC T/H OUTPUT DRIVERS SCLK CAL CS REFSEL G0 G1 G2 G3 VDRIVE CONTROL

Contextual Info: Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC AD7265 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS;

Contextual Info: Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC AD7265 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT REF The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS;

Contextual Info: Differential/Single-Ended Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC AD7266 FUNCTIONAL BLOCK DIAGRAM FEATURES REF SELECT REF The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS;

TMS320C5411

Abstract: SPORT01 ADSP-BF53x AD8022 DB10 TMS320C541 AD7265 AD7266 04603041
Contextual Info:  ֶ‫ݴ‬/‫܋ڇ‬๼෇Ăມࢃ2 MSPSĂ 12࿋Ă3ཚ‫ڢ‬SAR ADC AD7266 ༬Ⴀ ࠀీ઀཮ ມࢃ12࿋Ă3ཚ‫ڢ‬ADC REF SELECT DCAPA AVDD DVDD ཾུ໏୲ǖ2 MSPS REF ‫ۉۨܮ‬უ VDD ǖ2.7 V዁5.25 V AD7266 VA1 9 mW(1.5 MSPSLj3 V‫ۉ‬ᇸ)

AD7265

Abstract: AD7266 AD8022 TMS320C541
Contextual Info: Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC AD7265 FEATURES REF SELECT REF DCAPA AVDD DVDD BUF AD7265 VA1 VA2 VA3 VA4 MUX T/H 12-BIT SUCCESSIVE APPROXIMATION ADC OUTPUT DRIVERS VA5 SCLK CS RANGE SGL/DIFF A0 A1 A2 VA6 CONTROL LOGIC

40khz sine wave

Abstract: AS1545 DB10 DB10A DB11B "differential via" PS2003
Contextual Info: AS1545 D a ta S he e t Dual, 12-Bit, 1MSPS, SAR ADC 1 General Description 2 Key Features The AS1545 is a dual, 12-bit, 6-channel, 1 MSPS, high speed, successive approximation SAR analog-todigital converters (ADCs). The AS1545 is designed to operate with a single +2.7V to +5.25V supply and a

AD7265

Abstract: AD7266 AD8022 TMS320C541 SCR PULSE transformer circuit AD72651 DB9A
Contextual Info: Differential/Single-Ended Input, Dual 1 MSPS, 12-Bit, 3-Channel SAR ADC AD7265 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS;

AS1545

Abstract: "differential via" DB10 DB10A DB11B J-STD-020D
Contextual Info: Da t as heet AS1545 Dual, 12-Bit, 1MSPS, SAR ADC 1 General Description 2 Key Features The AS1545 is a dual, 12-bit, 6-channel, 1 MSPS, high speed, successive approximation SAR analog-todigital converters (ADCs). The AS1545 is designed to operate with a single +2.7V to +5.25V supply and a

Contextual Info: 1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators AD7262 FUNCTIONAL BLOCK DIAGRAM FEATURES VREF A AVCC REF VA + VA– AD7262 BUF PGA 12-BIT SUCCESSIVE APPROXIMATION ADC T/H OUTPUT DRIVERS SCLK CAL CS REFSEL G0 G1 G2 G3 VDRIVE CONTROL

CXA 1538 S

Contextual Info: 1 MSPS, 12-Bit, Simultaneous Sampling SAR ADC with PGA and Four Comparators AD7262 FEATURES FUNCTIONAL BLOCK DIAGRAM VREF A AVCC REF VA + VA– AD7262 BUF PGA 12-BIT SUCCESSIVE APPROXIMATION ADC T/H OUTPUT DRIVERS SCLK CAL CS REFSEL G0 G1 G2 G3 VDRIVE CONTROL

AD7356

Abstract: AD7356BRUZ DB10 DB10A DB11B
Contextual Info: Preliminary Technical Data Differential Input,Dual,Simultaneous Sampling, 5 MSPS, 12-Bit, SAR ADC AD7356 FEATURES Dual 12-bit SAR ADC Simultaneous Sampling Throughput rate: 5 MSPS Per Channel Specified for VDD of 2.5 V No latency to 12 bits Power dissipation:

Contextual Info: austriamicrosystems AG is now ams AG The technical content of this austriamicrosystems datasheet is still valid. Contact information: Headquarters: ams AG Tobelbaderstrasse 30 8141 Unterpremstaetten, Austria Tel: +43 0 3136 500 0 e-Mail: ams_sales@ams.com

BLACKFIN MOTION DETECTION

Abstract: circuit diagram of half adder LDR 16K ADSP-BF504F
Contextual Info: Blackfin Embedded Processor ADSP-BF504/ADSP-BF504F/ADSP-BF506F FEATURES PERIPHERALS Up to 400 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of

AD7265

Abstract: AD7266 AD8022 TMS320C541
Contextual Info: Differential/Single-Ended Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC AD7266 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS;

ADSP-BF504F

Contextual Info: Blackfin Embedded Processor ADSP-BF504/ADSP-BF504F/ADSP-BF506F FEATURES PERIPHERALS Up to 400 MHz high performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of

Contextual Info: Differential/Single-Ended Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC AD7266 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The input signal is sampled on the falling edge of CS;

DB02A

Abstract: DC01A DA02A db05a DB10A DA05A DA01A DA10A DC02A DR00142A
Contextual Info: D SERIES SMD VIDEO DELAY LINES • Surface mount compatible • Video performance • Small size, low cost • 50, 75 or 200 ohms This range of SMD delay lines is suitable for automatic placement and reflow, and so do not add the excessive production costs associated with through hole devices. They are designed to delay video bandwidth signal with

ad7352

Abstract: AD7356 AD7357 DB10 DB10A DB11B
Contextual Info: Preliminary Technical Data Differential Input,Dual,Simultaneous Sampling, 3 MSPS, 12-Bit, SAR ADC AD7352 FEATURES Dual 12-bit SAR ADC Simultaneous Sampling Throughput rate: 3 MSPS Per Channel Specified for VDD of 2.5 V No latency to 12 bits Power dissipation:

Contextual Info: FUNCTIONAL BLOCK DIAGRAM FEATURES Dual 12-bit, 3-channel ADC Fast throughput rate: 2 MSPS Specified for VDD of 2.7 V to 5.25 V Low power: 12 mW max at 1.5 MSPS with 3 V supplies 30 mW max at 2 MSPS with 5 V supplies Wide input bandwidth 70 dB SNR at 100 kHz input frequency

BF504

Abstract: ADSP-BF50X adsp BF506 BF50x BLACKFIN MOTION DETECTION PF10 crosscore ADZS-BF506-EZLITE HMVIP camera motors
Contextual Info: Blackfin Embedded Processor ADSP-BF504/F,ADSP-BF506F Preliminary Technical Data FEATURES PERIPHERALS Up to 400 MHz high-performance Blackfin processor Two 16-bit MACs, two 40-bit ALUs, four 8-bit video ALUs, 40-bit shifter RISC-like register and instruction model for ease of

AD7265

Abstract: AD7266 AD8022 TMS320C541
Contextual Info: Differential/Single-Ended Input, Dual 2 MSPS, 12-Bit, 3-Channel SAR ADC AD7266 FEATURES FUNCTIONAL BLOCK DIAGRAM REF SELECT REF The conversion process and data acquisition use standard control inputs allowing easy interfacing to microprocessors or DSPs. The