DAC1008D650 Search Results

Contextual Info: UM10435 DAC1x08WO demonstration board Rev. 01.00 — 30 septembre 2010 User manual Document information Info Content Keywords JESD204A, PCB2134, DAC, LabView, FPGA, Altera, Xilinx, Lattice Abstract This document describes the use of DAC1408D650WO/DB, DAC1208D650WO/DB, DAC1008D650WO/DB, DAC1408D750WO/DB,

JESD204A

Abstract: LN23 PH01 PH03 JEDEC204
Contextual Info: DAC1008D650 Dual 10-bit DAC; up to 650 Msps; 2x, 4× or 8× interpolating with JESD204A interface Rev. 2 — 17 December 2010 Product data sheet 1. General description The DAC1008D650 is a high-speed 10-bit dual channel Digital-to-Analog Converter DAC with selectable 2×, 4× or 8× interpolating filters optimized for multi-carrier WCDMA

Contextual Info: DAC1008D650 Dual 10-bit DAC; up to 650 Msps; 2, 4 or 8 interpolating with JESD204A interface Rev. 3 — 31 January 2012 Product data sheet 1. General description The DAC1008D650 is a high-speed 10-bit dual channel Digital-to-Analog Converter DAC with selectable 2, 4 or 8 interpolating filters optimized for multi-carrier WCDMA

Contextual Info: DAC1008D650 Dual 10-bit DAC; up to 650 Msps; 2, 4 or 8 interpolating with JESD204A interface Rev. 3 — 31 January 2012 Product data sheet 1. General description The DAC1008D650 is a high-speed 10-bit dual channel Digital-to-Analog Converter DAC with selectable 2, 4 or 8 interpolating filters optimized for multi-carrier WCDMA

diode ph03

Abstract: JESD204 K28*5 JESD204A LN23 PH01 PH03
Contextual Info: DAC1008D650 Dual 10-bit DAC; up to 650 Msps; 2x, 4× or 8× interpolating with JESD204A interface Rev. 1 — 1 October 2010 Preliminary data sheet 1. General description The DAC1008D650 is a high-speed 10-bit dual channel Digital-to-Analog Converter DAC with selectable 2×, 4× or 8× interpolating filters optimized for multi-carrier WCDMA

Contextual Info: DAC1008D650 Dual 10-bit DAC; up to 650 Msps; 2, 4 or 8 interpolating with JESD204A interface Rev. 04 — 2 July 2012 Product data sheet 1. General description The DAC1008D650 is a high-speed 10-bit dual channel Digital-to-Analog Converter DAC with selectable 2, 4 or 8 interpolating filters optimized for multi-carrier WCDMA

HVQFN64

Abstract: HVQFN40 ADC1410S ADC1215S ADC1215S065 ADC1215S080 ADC1215S105 ADC1215S125 ADC1410S065 ADC1410S080
Contextual Info: Type Related demoboard Description ADC1215S series ADC1215S065/DB ADC1215S065 demo board; both CMOS and LVDS ADC1215S080/DB ADC1215S080 demo board; both CMOS and LVDS ADC1215S105/DB ADC1215S105 demo board; both CMOS and LVDS ADC1215S125/DB ADC1215S125 demo board; both CMOS and LVDS

samtec connector

Abstract: ADC0808D250 ADC0808D ADC1415S080 LVDS connector ADC1010S080 HVQFN64 DEMO
Contextual Info: Type Related demoboard Description ADC1207S080 ADC1207S080/DB ADC1207S080 demo board ADC1210S series ADC1210S065/DB ADC1210S065 demo board; both CMOS and LVDS ADC1210S065F1/DB ADC1210S065 demo board; CMOS version; SPI, Regulators and CMOS buffer on board ADC1210S065F2/DB

Contextual Info: Best-in-Class ADCs & DACs Best-in-Class ADCs & DACs – IDT High-Speed ADC/DAC Selection Guide Integrated DeviceTechnology | | POWER MANAGEMENT ANALOG & RF INTERFACE & CONNECTIVITY | CLOCKS & TIMING | MEMORY & LOGIC | TOUCH & USER INTERFACE | DATA CONVERTER

Contextual Info: NXP high-speed ADC/ DAC selection guide Best-in-class ADCs & DACs Available with three different data interfaces including JESD204A/JESD204B , our high-speed ADC/DAC solutions deliver best-in-class performance, size, and functional integration. High-speed single- and dual-channel ADCs

12NC

Abstract: ADC1005S060 ADC1410S ADC1415S080 ddr pcb layout schematic usb to spi adapter ADC1112D125 ADC1113D125 ADC1212D ADC1413D125
Contextual Info: Demoboards for high-speed converters AK1005-160.indd 1 10-05-19 09:22 AK1005-160.indd 2 10-05-19 09:22 Naming convention for demoboards `` `` `` Root`name`follows`the`ADC/DAC`naming`convention Demoboard`name`ends`with`/DB