D9 TO D15 Search Results

Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N4 Group Overview Pin Configuration Figures 1.1.3 shows the pin configuration top view . P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5

Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N5 Group Overview Pin Configuration Figures 1.1.3 shows the pin configuration top view . P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5

Contextual Info: Renesas microcomputers M16C / 62P Group Overview SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Pin Configuration Figures 1.1.3 to 1.1.5 show the pin configurations top view . P10/D8 P11/D9 P12/D10 P13/D11 P14/D12 P15/D13/INT3 P16/D14/INT4 P17/D15/INT5 P20/AN20/A0(/D0/-)

Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N Group M16C/6NL, M16C/6NN 1. Overview P1_1/D9 P1_2/D10 P1_3/D11 P1_4/D12 P1_5/D13/INT3 P1_6/D14/INT4 P1_7/D15/INT5 P2_0/AN2_0/A0(/D0/-) P2_1/AN2_1/A1(/D1/D0)

PLQP0100KB-A

Contextual Info: Under development Preliminary specification Specifications in this manual are tentative and subject to change. M32C/8B Group 1. Overview D10 / P1_2 D9 / P1_1 D8 / P1_0 D7 / AN0_7 / P0_7 D6 / AN0_6 / P0_6 D5 / AN0_5 / P0_5 D4 / AN0_4 / P0_4 D3 / AN0_3 / P0_3

Contextual Info: Under development This document is under development and its contents are subject to change. M16C/6N Group M16C/6NK, M16C/6NM 1. Overview P1_1/D9 P1_2/D10 P1_3/D11 P1_4/D12 P1_5/D13/INT3 P1_6/D14/INT4 P1_7/D15/INT5 P2_0/AN2_0/A0(/D0/-) P2_1/AN2_1/A1(/D1/D0)

Contextual Info: SN65LVDS95ĆQ1 LVDS SERDES TRANSMITTER SGLS207A − OCTOBER 2003 − REVISED MAY 2008 DGG PACKAGE TOP VIEW D Qualified for Automotive Applications D 21:3 Data Channel Compression at up to 1.36 Gigabits per Second Throughput D4 VCC D5 D6 GND D7 D8 VCC D9

Contextual Info: M16C/30P Group 1.5 1. Overview Pin Configuration Figures 1.5 to 1.6 show the pin configurations top view . P1_0/D8 P1_1/D9 P1_2/D10 P1_3/D11 P1_4/D12 P1_5/D13/INT3 P1_6/D14/INT4 P1_7/D15 P2_0/A0 P2_1/A1 P2_2/A2 P2_3/A3 P2_4/A4 P2_5/A5 P2_6/A6 P2_7/A7 VSS

MIL-STD-1553

Abstract: HI-1575PQI
Contextual Info: HI-1575 MIL-STD-1553 3.3V Dual Transceivers with Integrated Encoder / Decoders August 2005 DESCRIPTION 30 29 D5 28 D6 27 D7 26 GND 25 D8 24 D9 23 D10 22 D11 21 - 11 12 13 14 15 16 17 18 19 20 1575PCI 1575PCT AR Y A single write cycle is used to transfer a word to the

DSP56001AFC33

Abstract: DSP56001A DSP56001AFE33 hack br mark
Contextual Info: Pin-out and Package PQFP Top View Package and Tray Descriptions 1 18 Orientation Mark chamfered edge DSP56001AFC33 (Top View) 51 84 nc D20 D19 D18 GNDD GNDD nc D17 D16 nc D15 D14 D13 nc D12 VCCD VCCD D11 nc D10 D9 nc D8 D7 D6 GNDD GNDD nc D5 D4 D3 D2 nc

MOTOROLA TOP MARK

Abstract: L002
Contextual Info: Pin-out and Package PQFP Top View Pin-out and Package Information 18 Orientation Mark chamfered edge (Top View) 51 84 GNDD D21 D20 VCCD D19 D18 GNDD D17 D16 D15 D14 GNDD D13 D12 VCCD D11 D10 GNDD GNDQ VCCQ D9 D8 D7 D6 GNDD D5 D4 VCCD D3 D2 GNDD D1 D0 DR

AT45DB321D-SU

Abstract: header 17x2 MA3X152K0L NLP-5x LP8340CDT-5.0 mic diode M7 CN1021 header 7x2 LP8345CDT NLP 5x
Contextual Info: 5 4 3 2 1 C1 0.1 C2 0.1 VDDOUT D3 D2 D1 D0 -TRST TMS TDO TDI TCK D8 D7 D6 D5 D4 D11 D10 D9 D13 D12 VCCB VCCB C143 0.1 C144 0.1 TP1 R1 220K R2 220K R3 220K R4 220K -RD 1 TP D VDDOUT -RD -WR -CS1 -CS0 D15 D14 A5 A4 A3 A2 A1 A0 VPP Test Point 1 2 3 4 5 6 7 8

P100

Abstract: P101 P102 P103 P104 P105 P106 P107
Contextual Info: Under development Preliminary specification Specifications in this manual are tentative and subject to change. M32C/80 Group 1. Overview 1.5 Pin Assignments P36 / A14 / D14 P37 / A15 ( / D15 ) P40 / A16 P41 / A17 52 51 Vcc2 60 53 P30 / A8 ( / D8 ) 61 P35 / A13 ( / D13 )

44-PIN

Abstract: LH532048 QFJ044-P-0650
Contextual Info: LH532048 • Access time: 100 ns MAX. 40-PIN DIP 40-PIN SOP TOP VIEW • Static operation NC 1 40 VCC CE 2 39 NC • TTL compatible I/O D15 3 38 A16 4 • Three-state outputs D14 37 A15 D13 5 36 A14 • Single +5 V power supply D12 6 35 A13 D11 7 34 A12

SCK D54

Abstract: BGA256 QFP208 SH7750 SH7750R SH7750S HD-36 D2156 VDDRTC
Contextual Info: 1 2 3 4 5 6 7 D33 D45 F D34 D44 G D35 D43 H D36 D42 J D39 D15 D0 D14 D1 D13 D2 D12 D3 D11 D4 D10 D5 D9 M N P R T 14 15 16 VDD-RTC 3.3V VSS-RTC EXTAL2 XTAL2 17 18 19 20 NMI MD1/TXD2 MD0/SCK D63 D48 D62 D49 D61 CA* MD2/RXD2 D50 D60 RD/ / / RXD , , , ,

PLQP0100KB-A

Contextual Info: M32C/8A Group 1. Overview A9 / D9 ] [ A10 / D10 [ A11 / D11 [ A12 / D12 [ A13 / D13 [ A14 / D14 [ A15 / D15 A9 , A10 A11 A12 A13 A14 A15 A16 A17 [ , , , , , , A8 , [ A8 / D8 ] ] ] ] ] ] ] D2 D3 D4 D5 D6 D7 / / / / / / A2 A3 A4 A5 A6 A7 [ [ [ [ [ [ , , , ,

PLQP0100KB-A

Contextual Info: M32C/87 Group M32C/87, M32C/87A, M32C/87B ( note 6) A9, [A9/D9] A10, [A10/D10] A11, [A11/D11] A12, [A12/D12] A13, [A13/D13] A14, [A14/D14] A15, [A15/D15] A16 A17 51 52 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 53 50 49 48 47 46 45 44 43 42 41

HP45

Abstract: TQFP 144 PACKAGE DIMENSION HP32 HP26 D2095 D16 LM HP-25 208TQFP HP39 D1691
Contextual Info: Pin-Out and Package Information 157 Orientation Mark Top View 53 NC NC IRQB IRQA D23 D22 D21 VCCD GNDD D20 D19 D18 D17 D16 D15 VCCD GNDD D14 D13 D12 D11 D10 D9 VCCD GNDD VCCQ GNDQ D8 D7 D6 D5 D4 D3 VCCD GNDD D2 D1 D0 A23 A22 VCCA GNDA A21 A20 A19 A18 VCCA

AN15

Abstract: PLQP0144KA-A
Contextual Info: R32C/118 Group 1.4 1. Overview Pin Assignments P1_1 / D9 / IIO0_1 / IIO1_1 P1_2 / D10 / IIO0_2 / IIO1_2 P1_3 / D11 / IIO0_3 / IIO1_3 P1_4 / D12 / IIO0_4 / IIO1_4 P1_5 / D13 / INT3 / IIO0_5 / IIO1_5 P1_6 / D14 / INT4 / IIO0_6 / IIO1_6 P1_7 / D15 / INT5 / IIO0_7 / IIO1_7

AN15

Abstract: PLQP0144KA-A
Contextual Info: R32C/117 Group 1.4 1. Overview Pin Assignments P1_1 / D9 / IIO0_1 / IIO1_1 P1_2 / D10 / IIO0_2 / IIO1_2 P1_3 / D11 / IIO0_3 / IIO1_3 P1_4 / D12 / IIO0_4 / IIO1_4 P1_5 / D13 / INT3 / IIO0_5 / IIO1_5 P1_6 / D14 / INT4 / IIO0_6 / IIO1_6 P1_7 / D15 / INT5 / IIO0_7 / IIO1_7

AN15

Abstract: PLQP0144KA-A UD1A R32C 116
Contextual Info: R32C/116 Group 1.4 1. Overview Pin Assignments P1_1 / D9 / IIO0_1 / IIO1_1 P1_2 / D10 / IIO0_2 / IIO1_2 P1_3 / D11 / IIO0_3 / IIO1_3 P1_4 / D12 / IIO0_4 / IIO1_4 P1_5 / D13 / INT3 / IIO0_5 / IIO1_5 P1_6 / D14 / INT4 / IIO0_6 / IIO1_6 P1_7 / D15 / INT5 / IIO0_7 / IIO1_7

74HC595

Abstract: 40 pin zif socket MAX6341CPA 20pf 100PF 10UF 2N7000 68-PIN AC22 LM78L09
Contextual Info: LM78L09 OP27EP MAX6341CPA OUT GND IN +12V +9V IC1 IC2 IN IC3 NR BAL1 BAL2 IN- V=843 OUT -5V GND TRIM IN+ OUT V- NC OP27EP BAL1 BAL2 +9V V+ V=843 VDDADC -5V IN- V+ IN+ OUT V- +9V REF NC GND D15 V=0.1UF V=0.1UF V=1.13K V=10UF V=0.1UF V=0.1UF V=1.13K V=10UF V=3.32K

rx2 RMC

Abstract: motorola H18 T17 motorola kk21 C1-D18 040BG MC68EN360rc 50MHZ 74F803 TC10
Contextual Info: OUT 8 D[0.31] 50MHZ U41 25 R58 8 D[0.31] PPCLK 4 5 10 11 Q0 Q1 Q2 Q3 1K R2 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 D31 3 6 9 12 JP1 1 TCK 2 TMS 3 TDI 4 TDO 5 *TRST 6 HEADER 6 CP 74F803

Contextual Info: Microcontroller Peripheral LSIs MN12511 Fluorescent Display Tube Driver LSI • Overview VPP NCE OE NSDO NSDI NSCK VSS VDD D15 D14 D13 D12 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 ■ Features • Sixteen high-voltage handling output ports