D4 L200 Search Results

Contextual Info: September 1994 Micro Linear ML2008, ML2009 jliP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithmic gain/attenuators with a range o f -2 4 to +24dB in 0.1 dB steps. • Low noise

104XA

Abstract: D817V
Contextual Info: September 1994 Micro Linear ML2008, ML2009 iP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithmic gain/attenuators with a range o f-2 4 to +24dB in 0.1dB steps. • Low noise Easy interface to microprocessors is provided by an input

Contextual Info: ML2008, ML2009 |iP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithmic gain/attenuators with a range o f-2 4 to +24dB in 0.1 dB steps. • Low noise Easy interface to microprocessors is provided by an input

Contextual Info: May 1988 1 % Micro Linear PR ELIM IN A R Y _ M L 2008, M L2009 ¡aP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and ML2009 are digitally controlled logarithmic gain/attenuators with a range of -24 to +24dB in 0.1 dB

Contextual Info: Micro Linear ML2008, ML2009 ¡xPCompatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and M L2009 are digitally controlled logarithm ic gain/attenuators w ith a range o f - 2 4 to +24dB in 0.1 dB steps. • ■ ■ ■ ■ Easy interface to microprocessors is provided by an input

Contextual Info: % M ie r o L in e a r ML2008, ML2009 ¡xP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The M L2008 and M L2009 are digitally controlled logarithm ic gain/attenuators w ith a range o f - 2 4 to + 24 dB in 0.1 dB steps. • Low noise OdBrnç max with +24dB gain

datasheet l200

Abstract: L200 XR19L200 XR19L200IL32 transceiver rs232 driver receiver RS232F
Contextual Info: XR19L200 PRELIMINARY SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER APRIL 2006 REV. P1.0.2 GENERAL DESCRIPTION APPLICATIONS The XR19L200 L200 is a highly integrated device that combines a single channel Universal Asynchronous Receiver and Transmitter (UART) and an RS-232

Contextual Info: XR19L200 SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER OCTOBER 2006 REV. 1.0.0 GENERAL DESCRIPTION APPLICATIONS The XR19L200 L200 is a highly integrated device that combines a single channel Universal Asynchronous Receiver and Transmitter (UART) and an RS-232

Contextual Info: XR19L200 SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER JULY 2007 REV. 1.0.2 GENERAL DESCRIPTION APPLICATIONS The XR19L200 L200 is a highly integrated device that combines a single channel Universal Asynchronous Receiver and Transmitter (UART) and an RS-232

L200

Abstract: XR16L580 XR19L200 XR19L200IL32
Contextual Info: XR19L200 SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER MAY 2007 REV. 1.0.1 GENERAL DESCRIPTION APPLICATIONS The XR19L200 L200 is a highly integrated device that combines a single channel Universal Asynchronous Receiver and Transmitter (UART) and an RS-232

datasheet l200

Abstract: D4 L200 L200 XR16L580 XR19L200 XR19L200IL32 RS232F
Contextual Info: XR19L200 SINGLE CHANNEL INTEGRATED UART AND RS-232 TRANSCEIVER JULY 2007 REV. 1.0.2 GENERAL DESCRIPTION APPLICATIONS The XR19L200 L200 is a highly integrated device that combines a single channel Universal Asynchronous Receiver and Transmitter (UART) and an RS-232

VMP4

Abstract: db3 c322 db3 c314 b30 c250 db3 c235 db3 c248 b30 c250 a2 db3 c244 b30 c300 - 1 FPS009-2405-0
Contextual Info: 8 D 7 6 5 4 2 1 D TP10 12V TO 14V DC INPUT R248 0R100 3V3 I limit = 0.1V / R . about 2.9A CR1 1V8 F1 STPS340U 3 J1 MP179_2.1mm 1 2 3 2A C256 2.2µF R257 0R100 TP11 + C18 470uF 25V TP17 U4 5 3V3 V+ 1 8 2 7 3 6 4 5 L3 22uH 3.8A + C22 220uF 16V 3 SHDN 2 3/5

AT91RM9200-EK Evaluation Board User Guide

Abstract: db3 c314 db3 c248 db3 c235 db3 c244 datasheets AT91RM9200-EK VMP4 VMP4 data sheet diode db3 c248 FPS009-2405-0
Contextual Info: AT91RM9200-EK Evaluation Board . User Guide Table of Contents Section 1 Overview . 1-1

Contextual Info: March 1997 ro Linear ML2008, ML2009 jiP Compatible Logarithmic Gain/Attenuator GENERAL DESCRIPTION FEATURES The ML2008 and ML2009 are digitally controlled logarithmic gain/attenuators with a range o f-24 to +24dB in 0.1 dB steps. • Low noise Easy interface to microprocessors is provided by an input

sil164

Abstract: sil-164 33rx4 u c739 SiI164CT64 D2461 sil 164 L300 SWITCH transistor C734 002BS
Contextual Info: 5 4 3 2 1 Power & Config D FPGA_CFG EXT_RESET# D FPGA_CFG CONFIG[9.0] EXT_RESET# RESET#[1.0] Reference ID: 100 CONFIG[9.0] RESET#[1.0] RESET#1 #2 Lime Evaluation Board Revision: PA8 RESET#1 C EXT_RESET# RESET#[1.0] FPGA_CFG CONFIG[9.0] RESET#1 Video

QL2009

Abstract: QL2009-1PB256C QL2009-1PF144C QL2009-1PQ208C TIL405
Contextual Info: Q L2009 9,000 Gate pASIC 2 FPGA Com bining Speed, Density, Low Cost and Flexibility PRELIMINARY DA TA pASIC 2 HIGHLIGHTS E Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance

L198N

Abstract: L33p L152P L60P L82p L108P L128N L203N l55p L69P
Contextual Info: Spartan-IIE 1.8V FPGA Family: Pinout Tables R DS077-4 2.1 February 14, 2003 Product Specification Pin Definitions Dedicated Pin Direction GCK0, GCK1, GCK2, GCK3 No Input Clock input pins that connect to Global Clock buffers or DLL inputs. These pins become user inputs when not needed for

sil164

Abstract: SiI164CT64 sil-164 schematic of rgb led video wall vo1c SAA7113 Application notes D-63225 FTSH-120 33rx4 MB86276
Contextual Info: Lime CREMSON-STARTERKITLIME Rev. 1.03 Feb 2007 1.03 Lime Evaluation Board Revision 1.03 2007 Fujitsu Microelectronics Europe Page 1 MB86276 Evaluation Board Manual Warranty and Disclaimer To the maximum extent permitted by applicable law, Fujitsu Microelectronics Europe GmbH restricts its

Contextual Info: Q L2007 7,000 Gate pASIC 2 FPGA Com bining Speed, Density, Low Cost and Flexibility Rev. C P R E L IM IN A R Y D A TA pASIC 2 HIGHLIGHTS 52 Ultimate Verilog/VHDL Silicon Solution -A bundant, high-speed interconnect elim inates m anual routing -Flexible logic cell provides high efficiency and perform ance

yd 7377

Abstract: ROW130 ST 9509 ci an 7591 PIA 8255 0805 d411 1.5 128x128 CSTN LCD LA 7670 AN 17820 IC an 7591 power amp
Contextual Info: SOLOMON SYSTECH SEMICONDUCTOR TECHNICAL DATA SSD1789A Advance Information 132 RGB x 132 CSTN LCD Segment I Common COLOR Driver with Controller This do cum ent contains information on a ne w product. Specifications and information herein are subject to change

zener diode c51 ph

Abstract: DIODE ZENER 2.9V FQPF*5n50c ZD53 zener diode c5 IPH FQPF5N50C EE2820 Fairchild ZD52, ZD53 15V, Zener Diode RECTIFIER DIODE D100 EE-2820
Contextual Info: www.fairchildsemi.com FAN7544 Simple Ballast Controller Features Descriptions • • • • • • • The FAN7544 provides simple and high performance electronic ballast control functions. The FAN7544 is optimized for electronic ballast requiring a minimum board area, by

ni usb 6212

Abstract: SS-00259-1 C2060 C2055 C2068 quanta C2096 R2067 915GM SW1010CPT
Contextual Info: 1 2 3 4 5 478 PIN micro FC-PGA 14, 15, 15w , 17w inch XGA, SXGA+ A LVDS LCD P7 P3,4 400/533 MHz A LVDS Alviso DVI M24/M26 UNBUFFERED DDRII SODIMM DDRII 400/533 P10 915GM/PM R/G/B CRT P9 R/G/B UNBUFFERED DDRII SODIMM DDRII 400/533 1257 PIN (micro FCBGA) PCIE 16Lanes

tp2350

Abstract: J200 mosfet DK 51* transistor IRF950 TRIPATH TC2001 250w audio amplifier circuit diagram capacitor 4.7uF 100v crossover passive TRIPATH pin connection of j200 transistor TK2350
Contextual Info: Tr i path Technol ogy, I nc. - Technical Information RB-TK2350-1 RB-TK2350-2 CLASS-T DIGITAL AUDIO AMPLIFIER REFERENCE BOARD USING DIGITAL POWER PROCESSING DPP T M TECHNOLOGY Technical Information Revision 1.5 June 2002 GENERAL DESCRIPTION The RB-TK2350 reference board is based on the TK2350 digital audio power amplifier

Contextual Info: 4 THIS DRAWING COPYRIGHT IS U N P U B LIS H E D . 2005 by 3 RELEASED tyco ELECTRONICS CORPORATION. FOR PUBLICATION ALL RIGHTS 2 FEB ,2 0 0 5 . R E V IS IO N S RESER VED . P LTR E1 D D E S C R IPTIO N R E V IS E D E C R - 09- 017308 HOW TO MATE AND UN MATE