D3A MARKING CODE Search Results

D3A transistor

Contextual Info: MC10E404, MC100E404 5 V ECL Quad Differential AND/NAND The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper

EP105

Abstract: MC100EP105 MC10EP105 QFN32 LQFP-32 footprint LQFP32 footprint
Contextual Info: MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

Contextual Info: MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

ECL IC NAND

Contextual Info: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be

MC100E404

Abstract: MC100E404FN MC100E404FNR2 MC10E404 MC10E404FN MC10E404FNR2 ECL IC NAND
Contextual Info: MC10E404, MC100E404 5VĄECL Quad Differential AND/NAND The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper

LQFP-32 footprint

Contextual Info: MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

Contextual Info: MC10E157, MC100E157 5 V ECL Quad 2:1 Multiplexer The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for random logic designs.

Contextual Info: resistors UR73 current sensing chip resistor EU features • • • • • Very low resistance, high precision reliability Utilization of thick film Low T.C.R. achieved ±100 ppm/°C Marking: Indigo body color with white marking Products with lead-free terminations meet EU RoHS

PART MARKING D0B

Contextual Info: MC10E404, MC100E404 5 V ECL Quad Differential AND/NAND Description The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design

ECL IC NAND

Abstract: H 3355 MC10E404 MC10E404FN MC10E404FNR2 MC100E404 MC100E404FN MC100E404FNR2
Contextual Info: MC10E404, MC100E404 5 V ECL Quad Differential AND/NAND The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper

marking CODE D2B

Abstract: MC100E404 MC100E404FN MC100E404FNR2 MC10E404 MC10E404FN MC10E404FNR2
Contextual Info: MC10E404, MC100E404 5VĄECL Quad Differential AND/NAND The MC10E404/100E404 is a 4-bit differential AND/NAND device. The differential operation of the device makes it ideal for pulse shaping applications where duty cycle skew is critical. Special design techniques were incorporated to minimize the skew between the upper

marking CODE D2B

Abstract: MARKING CODE D3B EP105 MC10EP105 MC10EP105FA MC10EP105FAR2 D3A transistor D3A marking code
Contextual Info: MC10EP105 Product Preview Quad 2-Input Differential AND/NAND The MC10EP105 is a 2–input differential AND/NAND gate. Each gate is functionally equivalent to a EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device, the EP105 is ideal for applications requiring the fastest AC performance available.

32 TQFP test socket

Abstract: marking CODE D2B EP105 MC100EP105 MC100EP105FA MC100EP105FAR2 MC10EP105 MC10EP105FA MC10EP105FAR2 MARKING CODE D3B
Contextual Info: MC10EP105, MC100EP105 3.3V / 5VĄECL Quad 2-Input Differential AND/NAND The MC10/100EP105 is a quad 2–input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

EP105

Abstract: MC100EP105 MC10EP105
Contextual Info: MC10EP105, MC100EP105 3.3V / 5V ECL Quad 2−Input Differential AND/NAND Description The MC10/100EP105 is a quad 2−input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

Contextual Info: MC10E157, MC100E157 5 V ECL Quad 2:1 Multiplexer Description The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for random logic designs.

ECL IC NAND

Contextual Info: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate Description The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be

Contextual Info: MC10E107, MC100E107 5V ECL Quint 2-Input XOR/XNOR Gate Description The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are

MC100E107

Abstract: MC100E107FN MC100E107FNR2 MC10E107 MC10E107FN MC10E107FNR2 marking CODE D2B
Contextual Info: MC10E107, MC100E107 5VĄECL Quint 2ĆInput XOR/XNOR Gate The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be used.

MC100E104

Abstract: MC100E104FN MC100E104FNR2 MC10E104 MC10E104FN MC10E104FNR2 ECL IC NAND
Contextual Info: MC10E104, MC100E104 5V ECL Quint 2-Input AND/NAND Gate The MC10E/100E104 is a quint 2-input AND/NAND gate. The function output F is the OR of all five AND gate outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are to be

tqfp 64 thermal resistance

Abstract: marking CODE D2B
Contextual Info: MC10EP105, MC100EP105 3.3V / 5VĄECL Quad 2-Input Differential AND/NAND The MC10/100EP105 is a quad 2–input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,

IC LM 3210

Abstract: MC100E157 MC10E157 MC10E157FN
Contextual Info: MC10E157, MC100E157 5 V ECL Quad 2:1 Multiplexer Description The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for random logic designs.

pin diagram ic 4030

Abstract: MC100E157 MC10E157 MC10E157FN IC LM 3210
Contextual Info: MC10E157, MC100E157 5 V ECL Quad 2:1 Multiplexer Description The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select SEL inputs. The individual select control makes the devices well suited for random logic designs.

MC100E107

Abstract: MC10E107 MC10E107FN
Contextual Info: MC10E107, MC100E107 5V ECL Quint 2-Input XOR/XNOR Gate Description The MC10E/100E107 is a quint 2-input XOR/XNOR gate. The function output F is the OR of all five XOR outputs, while F is the NOR. The Q outputs need not be terminated if only the F outputs are

EP105

Abstract: MC100EP105 MC100EP105FA MC100EP105FAR2 MC10EP105 MC10EP105FA MC10EP105FAR2
Contextual Info: MC10EP105, MC100EP105 3.3V / 5VĄECL Quad 2-Input Differential AND/NAND The MC10/100EP105 is a quad 2–input differential AND/NAND gate. Each gate is functionally equivalent to the EP05 and LVEL05 devices. With AC performance much faster than the LVEL05 device,