D1D24 Search Results

PS8743

Abstract: SSTU32864A PI74SSTU32864A Q11A Q13A
Contextual Info: PI74SSTU32864A 25-Bit 1:1 or 14-Bit 1:2 Configurable Registered Buffer Features Description • PI74SSTU32864A is designed for low-voltage operation, VDD = 1.8V • Supports Low Power Standby Operation • Enhanced Signal Integrity for 1 and 2 Rank Modules

LR 4100 RELAY

Contextual Info: 58 AM TE-32 ASSP Telecom Standard Product Data Sheet Released r, 20 05 12 :5 3: PM4332 y, 13 De ce m be TE-32 in er In co n Tu es da High Density 32 Channel T1/E1/J1 Framer Proprietary and Confidential Released Issue No. 6: November 2005 Do wn lo ad ed by

LR 4100 RELAY

Abstract: PM8316PGI 315-B PM8316-PGI
Contextual Info: PM8316 TEMUX 84 RELEASED DATA SHEET ISSUE 9 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX 10 :3 5: 14 PM PMC-1991437 ,1 3M ar ch ,2 00 6 PM8316 co n Mo nd ay TEMUX 84 DATA SHEET Do wn l oa de d by C on te nt T ea m of Pa rtm in er In HIGH DENSITY T1/E1 FRAMER WITH

BF96A

Abstract: CY2SSTU32866 Q11A Q13A Q8A-Q14A
Contextual Info: CY2SSTU32866 1.8V, 25-bit 1:1 or 14-bit (1:2) JEDEC-Compliant Data Register with Parity Features CSR# inputs are HIGH. If either DCS# or CSR# input is LOW, the Qn outputs will function normally. The RESET# input has priority over the DCS# and CSR# control and will force the

FF224

Abstract: PM4328
Contextual Info: PM4328 TECT3 STANDARD PRODUCT DATASHEET ISSUE 1 HIGH DENSITY T1/E1 FRAMER AND M13 MULTIPLEXER :0 1: 23 AM PMC-2011596 y, da rt on Tu es TECT3 10 Ma y ,2 00 5 04 PM4328 DATASHEET Do wn lo a de d by sa tis h d of ag er HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED M13 MULTIPLEXER

100nw

Abstract: 32P2U
Contextual Info: To all our customers Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog

Contextual Info: CHAPTER 1 GENERAL The juPD784046 subseries comprises 78K/IV series products that incorporates 10-bit A/D converter. The 78K/IV series comprises 16-bit single-chip microcontrollers equipped with a high-performance CPU that has a function such as accessing a

Contextual Info: 8: 09 AM PM5341 TEMAP 28 ASSP Telecom Standard Product Data Sheet Released ug Fr id ay ,0 8A TEMAP™ 28 us t, 20 03 07 :0 PM5341 Data Sheet Proprietary and Confidential Released Issue No. 1: May 2003 Do wn lo ad ed by Co nt en t Te am of Pa rtm in er In

Contextual Info: PM5366 TEMAP-84 PRELIMINARY DATASHEET PMC-2010672 ISSUE 2 HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER PM5366 TEMAP-84 HIGH DENSITY 84/63 CHANNEL VT/TU MAPPER AND M13 MULTIPLEXER DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 2: DECEMBER 2001

TCM2912

Abstract: TCM29C14A TCM2911 TCM129C13A TCM129C14A TCM129C16A TCM129C17A TCM2910A TCM2911A TCM29C13A
Contextual Info: TCM29C13A, TCM29C14A, TCM29C16A, TCM29C17A, TCM129C13A, TCM129C14A, TCM129C16A, TCM129C17A COMBINED SINGLE-CHIP PCM CODEC AND FILTER S CTS030D - A UG UST 1989 - REVISED JULY 1996 Replace Use of TCM2910A and TCM2911A in Tandem With TCM2912B/C FE A TU R E S TA B LE

Contextual Info: SBI Bus Serializer ASSP Telecom Standard Product Data Sheet Released PM8610 SBS SBI Bus Serializer Data Sheet Proprietary and Confidential Released Issue No. 5: June 2002 Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.

Contextual Info: PM8315 TEMUX STANDARD PRODUCT DATASHEET ISSUE 7 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX :5 4: 01 AM PMC-1981125 co n Fr id ay ,2 TEMUX 9O ct ob er ,2 00 4 10 PM8315 DATASHEET PROPRIETARY AND CONFIDENTIAL ISSUE 7: MAY 2001 Do wn lo

OPTIONS10

Contextual Info: PM8316 TEMUX-84 RELEASED DATA SHEET PMC-1991437 ISSUE 7 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX PM8316 TEMUX-84 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MULTIPLEXER DATA SHEET PROPRIETARY AND CONFIDENTIAL RELEASED

Contextual Info: PM8316 TEMUX-84 PRELIMINARY DATASHEET PMC-1991437 ISSUE 3 HIGH DENSITY 84 T1/63 E1 FRAMER WITH INTEGRATED VT/TU MAPPERS AND M13 MULTIPLEXERS PM8316 TEMUX-84 HIGH DENSITY 84 T1/63 E1 FRAMER WITH INTEGRATED VT/TU MAPPERS AND M13 MULTIPLEXERS DATASHEET PROPRIETARY AND CONFIDENTIAL

1587H

Contextual Info: PM8315 TEMUX PRELIMINARY DATASHEET PMC-981125 ISSUE 4 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX PM8315 TEMUX HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MULTIPLEXER DATASHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY

0x052B

Abstract: C2NC w12c PM4332 TE-32
Contextual Info: PM4332 TE-32 PRELIMINARY DATA SHEET PMC-2011402 ISSUE 1 HIGH DENSITY 32 CHANNEL T1/E1/J1 FRAMER PM4332 TE-32 HIGH DENSITY 32 CHANNEL T1/E1/J1 FRAMER DATA SHEET PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 1: JUNE 2001 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

Contextual Info: PM8312 TEMUX 32 RELEASED DATA SHEET ISSUE 4 HIGH DENSITY T1/E1 FRAMER WITH INTEGRATED VT/TU MAPPER AND M13 MUX 12 :4 2: 03 AM PMC-2050910 ,3 In co n Mo nd ay TEMUX 32 0J an ua ry ,2 01 2 PM8312 DATA SHEET PROPRIETARY AND CONFIDENTIAL RELEASED ISSUE 4: NOVEMBER 2009

Contextual Info: 6: 06 AM PM5366 TEMAP 84 ASSP Telecom Standard Product Data Sheet Preliminary 4M ar Fr id ay ,1 TEMAP 84 ch ,2 00 3 10 :0 PM5366 Data Sheet Proprietary and Confidential Preliminary Issue No. 4: February, 2003 Do wn lo ad ed by Co nt en t Te am of Pa rtm in

JESD82-7A

Abstract: CY2SSTU32864 Q11A Q13A DCS complete notes delta v dcs t4 a4 BA96A
Contextual Info: CY2SSTU32864 PRELIMINARY 1.8V, 25-bit 1:1 or 14-bit (1:2) JEDEC-Compliant Data Register Features The device monitors both DCS# and CSR# inputs and will gate the Qn outputs from changing states when both DCS# and CSR# inputs are high. If either DCS# or CSR# input is low, the

96-BALL

Abstract: PI74SSTUA32864 Q11A Q13A MO-205CC PI74SSTUA32864NBE
Contextual Info: PI74SSTUA32864 25-Bit 1:1 or 14-Bit 1:2 Configurable Registered Buffer Features Description • • • • Pericom Semiconductor’s PI74SSTUA32864 is a 25-Bit 1:1 or 14-Bit 1:2 configurable registered buffer and designed for 1.7V to 1.9V VDD operation. Designed for low-voltage operation: VDD = 1.8V

JESD82-7A

Abstract: CY2SSTU32864 Q11A Q13A D1525 delta v dcs BP96A
Contextual Info: CY2SSTU32864 1.8V, 25-bit 1:1 or 14-bit (1:2) JEDEC-Compliant Data Register Features The device monitors both DCS# and CSR# inputs and will gate the Qn outputs from changing states when both DCS# and CSR# inputs are high. If either DCS# or CSR# input is low, the

BF96A

Abstract: CY2SSTU32866 Q11A Q13A
Contextual Info: CY2SSTU32866 1.8V, 25-bit 1:1 or 14-bit (1:2) JEDEC-Compliant Data Register with Parity Features CSR# inputs are HIGH. If either DCS# or CSR# input is LOW, the Qn outputs will function normally. The RESET# input has priority over the DCS# and CSR# control and will force the

C2NC

Abstract: 0x052B PM4332 TE-32 TR-TSY-000008 277-TE 407 0X090A 5SIL4 0x09c6
Contextual Info: :35 PM TE-32 ASSP Telecom Standard Product Data Sheet Released t, 2 00 2 10 :54 PM4332 sd ay ,2 0A ug us TE-32 sil ico ne xp er to nT ue High Density 32 Channel T1/E1/J1 Framer Proprietary and Confidential Released Issue No. 5: June 2002 Do wn loa de db ya

S3P03

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview M M SF3P03HD Medium Power Surface Mount Products Motorola Preferred Device TMOS P-Channel Field E ffect Transistors SINGLE TMOS POWER FET 3.0 AMPERES 30 VOLTS RDS on = 0-1 OHM MiniMOS devices are an advanced series of power MOSFETs