D1835 Search Results

ra2b

Contextual Info: TOSHIBA THMY7264E0LEG-75,-80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY7264E0LEG is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704FT DRAMs and PLL/Registers on a printed circuit board.

D1825

Abstract: d1833 AN-265 D1531
Contextual Info: APPLICATION NOTE AN-265 BUS MATCHING WITH IDT FIFOs BUS MATCHING The following diagrams show how an external byte-oriented bus should be mapped to the 9-bit oriented FIFO. The Bus Matching feature offered in the SuperSync II family is a powerful feature designed to eliminate external MUXes. When used in applications where

D018

Abstract: D019 D032 D051 THMY7264G0LEG-75 RA1B
Contextual Info: TOSHIBA THMY7264G0LEG-75,-80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY7264G0LEG is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704FT DRAMs and PLL/Registers on a printed circuit board.

Contextual Info: SPECIFICATION CONTROL DRAWING FEMALE SOCKET CONTACT ACCEPTS .018/.011 DIA. x .100 MAX. LONG PIN P L .175 .120 DIA. DIA. _ .050 DIA. .065 .200 .073/.06B DIA. THRU TYP. 4 PLACES .295 1. MATING N O T A P P L IC A B L E 2. ELECTRICAL FREQUENCY RANGE GHz VSWK M AX. *

D883

Abstract: MIL-PRF38535 RH27C TM1019 lts 542 D88-3
Contextual Info: SPEC NO. 05-08-5114 REV. E RH27C LOW NOISE, HIGH SPEED PRECISION OP AMP DICE REVISION RECORD REV DESCRIPTION DATE INITIAL RELEASE A PAGE 9, FIGURE 4, CHANGED 0JA 09/29/99 B PAGE 3, PARAGRAPH 3. 8 CHANGED VERBIAGE ADDED “HEREIN “ AFTER TABLE 1. 01/04/00

D1835 transistor

Abstract: TRANSISTOR D1835
Contextual Info: Ordering number : EN2158B D1835 Bipolar Transistor 50V, 2A, Low VCE sat , NPN Single NP http://onsemi.com Applications • Voltage regulators, relay drivers, lamp drivers, electrical equipment Features • • Adoption of FBET, MBIT processes Low collector-to-emitter saturation voltage

EEFL

Abstract: 2sk4075 2SK4075-ZK TO-252 MOSFET 2sk4077 2SK3385 nec 78 2SK4077-ZK 2sk*4075 2sk4184
Contextual Info: MOSFET for LCD Backlight Inverters Multi CCFL and EEFL have been applied in recent years for LCD TV’s circuitry cost reduction purpose. In conjunction of this development trend, NEC Electronics offers low voltage MOSFET with optimal low on-state resistance that comes with high

d1835

Abstract: RA11b RA5B Toshiba RA8B D018 D019 D032 D051 RA1A
Contextual Info: TOSHIBA THMY1GE0SC70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 134,217,728-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY1GE0SC is a 134,217,728-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM804CFT DRAMs and PLL/Registers on a printed circuit board.

RA5B

Abstract: D018 D019 D032 D051 THMY1GE2SB70
Contextual Info: TO SH IBA THMY1GE2SB70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 134,217,728-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY1GE2SB is a 134,217,728-word by 72-bit synchronous dynamic RAM module consisting of 18 TC59SM824BFT DRAMs Top , 18 TC59SM804BFT DRAMs (Bottom) and PLL/Registers on a printed

RA11b

Abstract: RA5B D018 D019 D032 ra2b ra8b
Contextual Info: TOSHIBA THMY51E0SA70,75,80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY51E0SA is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704AFT DRAMs and PLL/Registers on a printed circuit board.

D1833

Abstract: D1825 AN-265 q815 D916
Contextual Info: APPLICATION NOTE AN-265 BUS MATCHING WITH IDT FIFOs BUS MATCHING The following diagrams show how an external byte-oriented bus should be mapped to the 9-bit oriented FIFO. The Bus Matching feature offered in the SuperSync II family is a powerful feature designed to eliminate external MUXes. When used in applications where

RA8A

Abstract: D018 D019 D032 RA11b
Contextual Info: TO SH IBA THMY51E0SA70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY51E0SA is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704AFT DRAMs and PLL/Registers on a printed circuit board.

30h80

Contextual Info: TO SH IBA THMY1GE2SB70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 134,217,728-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY1GE2SB is a 134,217,728-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM804BFT DRAMs and PLL/Registers on a printed circuit board.

Contextual Info: TOSHIBA THMY7264G0LEG-75,-80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY7264G0LEG is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704FT DRAMs and PLL/Registers on a printed circuit board.

lts 542

Abstract: MIL-PRF38535 RH27C TM1019 D883
Contextual Info: SPEC NO. 05-08-5114 REV. F RH27C LOW NOISE, HIGH SPEED PRECISION OP AMP DICE REVISION RECORD REV DESCRIPTION DATE INITIAL RELEASE A PAGE 9, FIGURE 4, CHANGED 0JA 09/29/99 B PAGE 3, PARAGRAPH 3. 8 CHANGED VERBIAGE ADDED “HEREIN “ AFTER TABLE 1. 01/04/00

RA5B

Abstract: RA11b d044 D018 D019 D032 D033 D051 THMY1GE0SB70
Contextual Info: TOSHIBA THMY1GE0SB70,75,80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 134,217,728-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY1GE0SB is a 134,217,728-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM804BFT DRAMs and PLL/Registers on a printed circuit board.

RA11b

Abstract: RA2B RA5B D018 d1835 D019 D032 D051 THMY7264E0LEG-75 RA8A
Contextual Info: TOSHIBA THMY7264E0LEG-75,-80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY7264E0LEG is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704FT DRAMs and PLL/Registers on a printed circuit board.

Contextual Info: TO SH IBA THMY51E0SA70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY51E0SA is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704AFT DRAMs and PLL/Registers on a printed circuit board.

Contextual Info: TOSHIBA THMY7264E0LEG-75,-80 T O SH IBA H YBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 67,108,864-W ORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY7264E0LEG is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704FT DRAMs and PLL/Registers on a printed circuit board.

D1835 transistor

Abstract: TRANSISTOR D1835 2SD1835
Contextual Info: D1835 Ordering number : EN2158B SANYO Semiconductors DATA SHEET D1835 NPN Epitaxial Planar Silicon Transistor Driver Applications Applications • Voltage regulators, relay drivers, lamp drivers, electrical equipment Features • • Adoption of FBET, MBIT processes

ra8b

Abstract: RA-2 RA1A D018 D019 D032 D033 D051 THMY1GE0SB70 RA12A
Contextual Info: TOSHIBA THMY1GE0SB70,75,80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 134,217,728-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY1GE0SB is a 134,217,728-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM804BFT DRAMs and PLL/Registers on a printed circuit board.

RA5B

Abstract: d1835 RA11b ra8b D018 D019 D032 D033 D051 THMY1GE0SB70
Contextual Info: TOSHIBA THMY1GE0SB70,75,80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 134,217,728-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY1GE0SB is a 134,217,728-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM804BFT DRAMs and PLL/Registers on a printed circuit board.

d1878

Abstract: D1887 C4106 D1880 D1825 transistors D1878 c3987 C4161 D1651 k1459
Contextual Info: Transistors Type Number SAVYO In dex *:New products for Type No. Package Page Type No. Package Page Type No. Package 2SA Type NP 2SA1016.il A1177 SPA AI207 NP A1208 MP A1209 T0126 A 1246 NP A 1248 T0126 il A1249 A 1252 CP A 1253 SPA A1256 CP il Al 257 A1258

D1835

Abstract: ra8b Toshiba RA8B RA5B D018 D019 D032 D051 THMY7264E0LEG-75 RA1A
Contextual Info: TOSHIBA THMY7264E0LEG-75,-80 TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 67,108,864-WORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY7264E0LEG is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704FT DRAMs and PLL/Registers on a printed circuit board.