CY7C436X4V Search Results

72-bit-wide

Abstract: CY7C37256 CY7B933 A9-A17 CY7B923 CY7C4285 CY7C43644V CY7C43664V CY7C43682V CY7C43684V
Contextual Info: Designing with CY7C436xx Synchronous FIFOs Cypress Semiconductor offers four families of 3.3V x36 FIFOs: The unidirectional with Bus Matching CY7C436x3V, the bidirectional CY7C436x2V, the bidirectional with Bus Matching CY7C436x4V, and the Tri Bus with Bus Matching

JDS SB switch

Abstract: CY7C43644V CY7C43664V CY7C43684V CY7C43664V/CY7C43684V
Contextual Info: CY7C43644V CY7C43664V/CY7C43684V PRELIMINARY CYPRESS 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching Features — Ic c = 60 m A , lSB= 12 m A F ully a s yn ch ro n o u s and sim u ltan eo u s read and w rite o p e ratio n p erm itted FWFT Mode, Ptease See Errata Attached

Contextual Info: PRELIMINARY CY7C43644V CY7C43664V/CY7C43684V 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching Features • 3.3V high-speed, low-power, bidirectional, first-in first-out FIFO mem ories w/ bus matching capabilities • 1 Kx36x2 (CY7C43644V)

Contextual Info: CY7C43644V CY7C43664V/CY7C43684V PRELIMINARY 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching — ICC= 60 mA , ISB= 12 mA • Fully asynchronous and simultaneous read and write operation permitted • Mailbox bypass register for each FIFO

A179B

Abstract: CY7C43644V CY7C43664V CY7C43684V CY7C436X4V
Contextual Info: V CY7C43644V CY7C43664V/CY7C43684V PRELIMINARY 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching • Fully asynchronous and simultaneous read and write operation permitted • Mailbox bypass register for each FIFO • Parallel and Serial Programmable Almost-Full and Almost-Empty flags

B1826

Abstract: a917
Contextual Info: CY7C43644V CY7C43664V/CY7C43684V PRELIMINARY 3.3V 1K/4K/16K x36 x2 Bidirectional Synchronous FIFO w/ Bus Matching — ICC= 60 mA , ISB= 12 mA • Fully asynchronous and simultaneous read and write operation permitted • Mailbox bypass register for each FIFO