CY7C371Ì Search Results

Contextual Info: w ~ CYPRESS Features • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • In-System Reprogrammable ISR Flash technology — JTAG interface • No hidden delays • High speed — f M A X = 143 MHz — tpD= 8*5 ns

Contextual Info: fax id: 6136 PRELIMINARY CY7C371 i UltraLogic 32-Macrocell Flash CPLD Features sig ne d to bring the ease of use and high pe rfo rm an ce o f the 22V 10, as w ell as PCI Local Bus S pe cifica tion sup po rt, to high -den sity CPLDs. • 32 m a cro c ells in tw o logic blocks

Contextual Info: fax id: 6136 CY7C371 i ^C YPR ESS UltraLogic 32-Macrocell Flash CPLD Features sig ne d to bring the ease of use and high pe rfo rm an ce o f the 22V 10, as w ell as PCI Local Bus S pe cifica tion sup po rt, to high -den sity CPLDs. • 32 m a cro c ells in tw o logic blocks

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Contextual Info: fax id: 6136 C Y7C371 i p vp v « *1 X X UltraLogic 32-Macrocell Flash CPLD Features • 32 m a croc e lls in two logic b lo c ks • 32 I/O pin s • 5 dedicated inp u ts in c lu d in g 2 clock pins • In-System R e p ro gram m a b le ISR™ Flash te ch n o lo g y

l83A

Abstract: cypress flash 370
Contextual Info: fax id: 6136 PRELIMINARY C'i- CY7C371 i UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. • 32 macrocells in two logic blocks

Contextual Info: fax id: 6136 W CYPRESS PRELIMINARY CY7C371 i UltraLogic 32-Macrocell Flash CPLD signed to bring the ease of use and high performance of the 22V10, as well as PCI Local Bus Specification support, to high-density CPLDs. Features • • • • 32 macrocells in two logic blocks

cypress flash 370 CPLD

Contextual Info: F la s h 3 7 0 i ISR ™ W CYPRESS ADVANCED i n f o r m a t i o n CPLD Family UltraLogic ™ High-Density Flash CPLDs Features • Warp2 !Warp2 + — Low-cost, text-based design tool, PLD compiler — IEEE 1164-compliant VHDL — Available on PC, Sun, and HP plat­

cypress flash 370

Contextual Info: '#C YPR ESS ADVANCED INFORMATION CY7C371Ì UltraLogic 32-Macrocell Flash CPLD Features • 32 macrocells in two logic blocks • 32 I/O pins • 6 dedicated inputs including 2 clock pins • In-System Reprogrammable 1SR " Flash technology — JT A (i interface

CY7C371

Contextual Info: fax id: 6136 CY7C371 i CYPRESS UltraLogic 32-Macrocell Flash CPLD Features signed to bring the ease of use and high perform ance o f the 22V 10, as w ell as PCI Local Bus S pe cifica tion support, to high -den sity CPLDs. • 32 m a cro cells in tw o logic b locks

Contextual Info: PRELIMINARY CYPRESS UltraLogic 32-Macrocell Flash CPLD Device CPLD and is part of the FLASH370i “ family of high-density, high­ speed CPLDs. Like all members of the FLASH370i family, the CY7C371i is de­ signed to bring the ease of use and high performance of the 22V10, as well as PCI