CY7C1394JV18 Search Results
CY7C1394JV18 Datasheets Context Search
| Catalog Datasheet | Type | Document Tags | |
|---|---|---|---|
AN5062Contextual Info: THIS SPEC IS OBSOLETE Spec No: 001-44698 Spec Title: CY7C1393JV18 CY7C1394JV18, 18 MBIT DDR II SIO SRAM TWO WORD BURST ARCHITECTURE Sunset Owner: N Vijay Kumar VKN Replaced by: None CY7C1393JV18 CY7C1394JV18 18 Mbit DDR II SIO SRAM Two Word Burst Architecture |
Original |
CY7C1393JV18 CY7C1394JV18, CY7C1394JV18 CY7C1393JV18, CY7C1394JV18 AN5062 | |
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Contextual Info: CY7C1393JV18 CY7C1394JV18 18 Mbit DDR II SIO SRAM Two Word Burst Architecture Features Functional Description • 18 Mbit Density 1M x 18, 512K x 36 ■ 300 MHz Clock for High Bandwidth ■ Two word Burst for reducing Address Bus Frequency ■ Double Data Rate (DDR) Interfaces |
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CY7C1393JV18 CY7C1394JV18 | |
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Contextual Info: CY7C1392JV18/CY7C1992JV18 CY7C1393JV18/CY7C1394JV18 18-Mbit DDR II SIO SRAM 2-Word Burst Architecture Features Functional Description • 18- Mbit Density 2M x 8, 2M x 9, 1M x 18, 512K x 36 ■ 300 MHz Clock for High Bandwidth ■ 2-word Burst for reducing Address Bus Frequency |
Original |
CY7C1392JV18/CY7C1992JV18 CY7C1393JV18/CY7C1394JV18 18-Mbit CY7C1392JV18, CY7C1992JV18, CY7C1393JV18, CY7C1394JV18 | |
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Contextual Info: CY7C1392JV18, CY7C1992JV18 CY7C1393JV18, CY7C1394JV18 18-Mbit DDR-II SIO SRAM 2-Word Burst Architecture Features Functional Description • 18- Mbit Density 2M x 8, 2M x 9, 1M x 18, 512K x 36 ■ 300 MHz Clock for High Bandwidth ■ 2-word Burst for reducing Address Bus Frequency |
Original |
CY7C1392JV18, CY7C1992JV18 CY7C1393JV18, CY7C1394JV18 18-Mbit CY7C1992JV18, CY7C1394JV18 |