CY7C1168V18 Search Results
CY7C1168V18 Datasheets (3)
Part | ECAD Model | Manufacturer | Description | Datasheet Type | PDF Size | Page count | |
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CY7C1168V18 |
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18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) | Original | 1.02MB | 27 | ||
CY7C1168V18-375BZC |
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18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) | Original | 433.46KB | 27 | ||
CY7C1168V18-400BZC |
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18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.5 Cycle Read Latency) | Original | 433.46KB | 27 |
CY7C1168V18 Price and Stock
Infineon Technologies AG CY7C1168V18-400BZCIC SRAM 18MBIT PARALLEL 165FBGA |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CY7C1168V18-400BZC | Tray | 136 |
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Infineon Technologies AG CY7C1168V18-375BZCIC SRAM 18MBIT PAR 165FBGA |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CY7C1168V18-375BZC | Tray | 136 |
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Rochester Electronics LLC CY7C1168V18-375BZCIC SRAM 18MBIT PAR 165FBGA |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CY7C1168V18-375BZC | Tray | 9 |
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Rochester Electronics LLC CY7C1168V18-400BZCIC SRAM 18MBIT PARALLEL 165FBGA |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CY7C1168V18-400BZC | Tray | 7 |
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Buy Now | ||||||
Infineon Technologies AG CY7C1168V18-400BZXCIC SRAM 18MBIT PARALLEL 165FBGA |
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Distributors | Part | Package | Stock | Lead Time | Min Order Qty | Price | Buy | ||||
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CY7C1168V18-400BZXC | Tray | 136 |
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Buy Now |
CY7C1168V18 Datasheets Context Search
Catalog Datasheet | Type | Document Tags | |
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Contextual Info: CY7C1166V18 CY7C1177V18 CY7C1168V18 CY7C1170V18 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • 18 Mbit density (2M x 8, 2M x 9, 1M x 18, 512K x 36) ■ 300 MHz to 400 MHz clock for high bandwidth |
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CY7C1166V18 CY7C1177V18 CY7C1168V18 CY7C1170V18 18-Mbit CY7C1166V18, CY7C1177V18, CY7C1168V18, CY7C1170V18 CY7C1166V18) | |
Contextual Info: CY7C1168V18 CY7C1170V18 PRELIMINARY 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • • • • 18-Mbit density (1M x 18, 512K x 36) 300 MHz to 400 MHz clock for high bandwidth 2-Word burst for reducing address bus frequency |
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CY7C1168V18 CY7C1170V18 18-Mbit 165-ball | |
CY7C1166V18
Abstract: CY7C1168V18 CY7C1170V18 CY7C1177V18
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CY7C1166V18, CY7C1177V18 CY7C1168V18, CY7C1170V18 18-Mbit CY7C1177V18, CY7C1170V18 CY7C1166V18 CY7C1168V18 CY7C1177V18 | |
Contextual Info: CY7C1177V18 CY7C1168V18 CY7C1170V18 PRELIMINARY 18-Mbit DDR-II+ SRAM 2-Word Burst Architecture 2.5 Cycle Read Latency Features Functional Description • 18-Mbit density (2M x 9, 1M x 18, 512K x 36) • 300 MHz to 400 MHz clock for high bandwidth • 2-Word burst for reducing address bus frequency |
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CY7C1177V18 CY7C1168V18 CY7C1170V18 18-Mbit CY7C1177V18/CY7C1168V18/CY7C1170V18 | |
CY7C1166V18
Abstract: CY7C1168V18 CY7C1170V18 CY7C1177V18
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CY7C1166V18 CY7C1177V18 CY7C1168V18 CY7C1170V18 18-Mbit CY7C1166V18 CY7C1168V18 CY7C1170V18 CY7C1177V18 | |
3M Touch SystemsContextual Info: THIS SPEC IS OBSOLETE Spec No: 001-06620 Spec Title: CY7C1166V18/CY7C1177V18/CY7C1168V18/ CY7C1170V18, 18-MBIT DDR-II+ SRAM 2-WORD BURST ARCHITECTURE 2.5 CYCLE READ LATENCY Sunset Owner: Jayasree Nayar (NJY) Replaced by: None CY7C1166V18, CY7C1177V18 CY7C1168V18, CY7C1170V18 |
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CY7C1166V18/CY7C1177V18/CY7C1168V18/ CY7C1170V18, 18-MBIT CY7C1166V18, CY7C1177V18 CY7C1168V18, CY7C1170V18 CY7C1177V18, 3M Touch Systems |